Automotive Electronic Power

Nick Hendricks: I was drag racing. I'm a drag racer. Detective Samson: You were drag racing. Nick Hendricks: [nods] Detective Samson: In a Prius. Nick Hendricks: I don't win a lot. —Horrible Bosses (2011) Automobiles are now a platform for multiple electronic devices. From controllers for complex hybrid drive systems like those found in the Toyota Prius to all types of entertainment s... » read more

New Market Expectations For 2015

This year more than 26 people provided predictions for 2015. Most of these came from the EDA industry, so the results may be rather biased. However, ecosystems are coming closer together in many parts of the semiconductor food chain, meaning that the EDA companies often can see what is happening in dependent industries and in the system design houses. Thus their predictions may have already res... » read more

EDA Shapes Its Future

In part one of this series, Semiconductor Engineering looked at growth within the EDA industry and the types of approaches being made to expand the scope of the markets that they serve. Scope expansion comes from the creation of new tools, the growth of companies in the IP space and the various ways in which opportunities can be found in new markets. Additional growth opportunities come from so... » read more

The Week In Review: Sept. 6

By Ed Sperling ARM acquired Cadence’s high-resolution display processor cores, which it helped to co-develop. Coupled with ARM’s own graphics, the move sets up ARM to sell complete subsystems. Cadence also won a deal with SMIC, which is using Cadence’s low-power flow and signoff technology for its 40nm process. Mentor Graphics won a deal with Advanced Wireless Semiconductor Co., whic... » read more

The Week In Review: July 26

By Ed Sperling Cadence’s Q2 revenue increased 11% to $362 million compared to $326 million in the same period in 2012. On a GAAP basis, net income dropped to $9 million compared with $36 million in 2012, but that decrease was impacted by the cost of recent acquisitions and integration of companies. On a non-GAAP basis, income was $61 million compared with $53 million in Q2 2012. Dassault... » read more

Blog Review: July 24

By Ed Sperling Mentor’s Harry Foster unleashes part six of the Wilson Research Group functional verification study, this segment digging deeper into the time spent in verification. The numbers have surpassed time spent on the design side, which either means the front-end tools are getting better or the verification problem is becoming more difficult. Cadence’s Brian Fuller interviews I... » read more

Blog Review: July 10

By Ed Sperling Mentor’s Harry Foster rolls out part four of his epic functional verification study, this one on design and verification reuse. If you work in the verification world, pounce. Cadence’s Brian Fuller looks back over a quarter century of technology—and what the average salary of a hardware design engineer will be in a 15 years: $499,000. But what will a cup of coffee cost?... » read more

The Week In Review: July 8

By Ed Sperling Mentor Graphics put into place a second shareholder rights to plan to ward off hostile takeovers. This one increases the threshold for triggering the rights plan to 20% of common stock from the previous 15%, and allows a qualifying offer provision that allows the board to call a special meeting provided the exercise price per right is increased to $90 from $65. It also extends ... » read more

De-Mystifying The SoC Supply Chain

By Barbara Jorgensen At the heart of every supply chain operation is the desire to mitigate risk. In theory, a supply chain allows a customer to leverage the best of the best in technology, logistics or production at a lower cost than DIY (do it yourself.) The system on chip (SoC) supply chain is no different—there’s a whole ecosystem in the semiconductor industry that supports design, pro... » read more

The Week In Review: June 21

By Ed Sperling Mentor Graphics rolled out emulation-ready verification IP for MIPI camera and display-based protocols. The VIP enables stimuli generated by UVM and SystemC-based environments and applies them to a design under test (DUT) running in the emulator. Synopsys introduced a tool for implementing and verifying functional engineering change orders, including matching, visualization ... » read more

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