Designing Networking Chips


Susheel Tadikonda, vice president of networking and storage at Synopsys, talks about what’s changed in the way networking chips are being designed to deal with a massive increase in data. One of those shifts involves software-defined networking, where the greatest complexity resides in the software. That also has a big impact on the entire design flow, from pre-silicon to post-silicon. htt... » read more

The Data Deluge


Lip-Bu Tan, president and CEO of Cadence, sat down with Semiconductor Engineering to discuss the intersection of big data and technology, from the data center to the edge and vertical markets such as automotive. What follows are excerpts of that conversation. SE: What are the biggest changes you've seen over the past year? Tan: We are moving quickly toward data-driven economics. There... » read more

Mostly Upbeat Outlook For Chips


2019 has started with cautious optimism for the semiconductor industry, despite dark clouds that dot the horizon. Market segments such as cryptocurrencies and virtual reality are not living up to expectations, the market for smart phones appears to be saturated, and DRAM prices are dropping, leading to cut-backs in capital expenditures. EDA companies are talking about sales to China being pu... » read more

Dirty Data: Is the Sensor Malfunctioning?


Sensors provide an amazing connection to the physical world, but extracting usable data isn't so simple. In fact, many first-time IoT designers are unprepared for how messy a sensor’s data can be. Every day the IoT motion-sensor company MbientLab struggles to tactfully teach its customers that the mountain of data they are seeing is not because the sensors are faulty. Instead, the system d... » read more

VM Aware Fibre Channel Virtual Machine Traffic Visibility for SANs


Mysteries of the world, such as how the Monarch butterflies can find their way migration paths all the way back to their species’ origination point even though they had never been there before, but these occurrences in nature should remain a complete mystery. With VM clusters generating an increasing amount of FC traffic that crisscrosses across SANs within enterprise/datacenter ecosystem, th... » read more

AI Chip Architectures Race To The Edge


As machine-learning apps start showing up in endpoint devices and along the network edge of the IoT, the accelerators that make AI possible may look more like FPGA and SoC modules than current data-center-bound chips from Intel or Nvidia. Artificial intelligence and machine learning need powerful chips for computing answers (inference) from large data sets (training). Most AI chips—both tr... » read more

Building AI SoCs


Ron Lowman, strategic marketing manager at Synopsys, looks at where AI is being used and how to develop chips when the algorithms are in a state of almost constant change. That includes what moves to the edge versus the data center, how algorithms are being compressed, and what techniques are being used to speed up these chips and reduce power. https://youtu.be/d32jtdFwpcE    ... » read more

Machine Learning Shifts More Work to FPGAs, SoCs


A wave of machine-learning-optimized chips is expected to begin shipping in the next few months, but it will take time before data centers decide whether these new accelerators are worth adopting and whether they actually live up to claims of big gains in performance. There are numerous reports that silicon custom-designed for machine learning will deliver 100X the performance of current opt... » read more

Variation In Low-Power FinFET Designs


One of the biggest advantages of moving to the a leading edge process node is ultra-low voltage operation, where devices can achieve better performance using less power. But the latest generation process nodes also introduce a number of new challenges due to increased variation that can affect everything from signal integrity to manufacturing yield. While variation is generally well understo... » read more

The Week In Review: Design


M&A MIPS has reportedly been acquired again, this time by AI startup Wave Computing. Wave focuses on data center-based neural network training using its parallel dataflow processing architecture. In March, the company signed on to use 64-bit multi-threaded processor cores from MIPS in future projects. Previously, MIPS was owned by Tallwood Venture Capital, which acquired MIPS from Imaginat... » read more

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