tag: deep learning

Gaps Emerge In Test And Analytics
By Ed Sperling - 10 Dec, 2019 - Comments: 0

Sensor and process drift, increased design complexity, and continued optimization of circuitry throughout its lifetime are driving test and analytics in new directions, requiring a series of base comparisons against which equipment and processes can be measured. In the design world this type of platform is called a digital twin, but in the test world there is no equivalent today. And as more... » read more

Making And Protecting Advanced Masks
By Mark LaPedus - 27 Nov, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss lithography and photomask trends with Bryan Kasprowicz, director of technology and strategy and a distinguished member of the technical staff at Photronics; Thomas Scheruebl, director of strategic business development and product strategy at Zeiss; Noriaki Nakayamada, senior technologist at NuFlare; and Aki Fujimura, chief executive of D2S. What fol... » read more

Using Digital Twins And DL In Lithography
By Ed Sperling - 21 Nov, 2019 - Comments: 0

Leo Pang, chief product officer and executive vice president at D2S, looks at the results of inverse lithography technology at advanced nodes using curvilinear patterns, and how that can be combined with a digital twin and deep learning speed up time to market and reduce cost. » read more

Big Shift In AI Perception
By Ed Sperling - 08 Oct, 2019 - Comments: 0

Artificial intelligence, which has been controversial since its inception, is getting a makeover. While fears about massive job displacement and autonomous killing machines will persist, and maybe even grow, AI is being portrayed as a valuable tool for people who know how to harness its capabilities. Underlying all of this is cheap compute and storage, which has made it possible to draw more... » read more

Reducing Costly Flaws In Heterogeneous Designs
By Ed Sperling - 08 Oct, 2019 - Comments: 0

The cost of defects is rising as chipmakers begin adding multiple chips into a package, or multiple processor cores and memories on the same die. Put simply, one bad wire can spoil an entire system. Two main issues need to be solved to reduce the number of defects. The first is identifying the actual defect, which becomes more difficult as chips grow larger and more complex, and whenever chi... » read more

How Hardware Can Bias AI Data
By Ed Sperling - 10 Sep, 2019 - Comments: 1

Clean data is essential to good results in AI and machine learning, but data can become biased and less accurate at multiple stages in its lifetime—from moment it is generated all the way through to when it is processed—and it can happen in ways that are not always obvious and often difficult to discern. Blatant data corruption produces erroneous results that are relatively easy to ident... » read more

Nvidia’s Top Technologists Discuss The Future Of GPUs
By SE Staff - 10 Sep, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss the role of the GPU in artificial intelligence, autonomous and assisted driving, advanced packaging and heterogeneous architectures with Bill Dally, Nvidia’s chief scientist, and Jonah Alben, senior vice president of Nvidia’s GPU engineering, at IEEE’s Hot Chips 2019 conference. What follows are excerpts of that conversation. SE: There are ... » read more

System Bits: Aug. 5
By Jeff Dorsch - 05 Aug, 2019 - Comments: 0

Algorithm could advance quantum computing Scientists at the Los Alamos National Laboratory report the development of a quantum computing algorithm that promises to provide a better understanding of the quantum-to-classical transition, enabling model systems for biological proteins and other advanced applications. “The quantum-to-classical transition occurs when you add more and more parti... » read more

EUV, Deep Learning Issues In Mask Making
By Mark LaPedus - 01 Jul, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss extreme ultraviolet (EUV) lithography, photomask technologies and machine learning issues with Emily Gallagher, principal member of the technical staff at Imec; Harry Levinson, principal at HJL Lithography; Chris Spence, vice president of advanced technology development at ASML; Banqiu Wu, senior director of process development at Applied Materials;... » read more

Rethinking What Goes On A Chip
By Ed Sperling - 27 Jun, 2019 - Comments: 0

There are hints across the chip industry that chipmakers are beginning to reexamine one of the basic concepts of chip design. For more than 50 years, progress in semiconductors was measured by the ability to double the density of transistors on a piece of silicon. While that approach continues to be useful, the power and performance benefits have been dwindling for the past couple of nodes. ... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy