Distilling The Essence Of Four DAC Keynotes

By Brian Bailey - 28 Jul, 2022 - Comments: 0

Chip design and verification are facing a growing number of challenges. How they will be solved — particularly with the addition of machine learning — is a major question for the EDA industry, and it was a common theme among four keynote speakers at this month's Design Automation Conference. DAC has returned as a live event, and this year's keynotes involved the leaders of a systems comp... » read more

Identifying PCB Defects with a Deep Learning Single-Step Detection Model

By Technical Paper Link - 22 Jul, 2022 - Comments: 0

This new technical paper titled "End-to-end deep learning framework for printed circuit board manufacturing defect classification" is from researchers at École de technologie supérieure (ÉTS) in Montreal, Quebec. Abstract "We report a complete deep-learning framework using a single-step object detection model in order to quickly and accurately detect and classify the types of manufacturi... » read more

Neuromorphic Computing: Challenges, Opportunities Including Materials, Algorithms, Devices & Ethics

By Technical Paper Link - 06 Jul, 2022 - Comments: 0

This new research paper titled "2022 roadmap on neuromorphic computing and engineering" is from numerous researchers at Technical University of Denmark, Instituto de Microelectrónica de Sevilla, CSIC, University of Seville, and many others. Partial Abstract: "The aim of this roadmap is to present a snapshot of the present state of neuromorphic technology and provide an opinion on the chall... » read more

Finding Wafer Defects Using Quantum DL

By Technical Paper Link - 13 Jun, 2022 - Comments: 0

New research paper titled "Semiconductor Defect Detection by Hybrid Classical-Quantum Deep Learning" by researchers at National Tsing Hua University. Abstract "With the rapid development of artificial intelligence and autonomous driving technology, the demand for semiconductors is projected to rise substantially. However, the massive expansion of semiconductor manufacturing and the develo... » read more

Deep Learning Applications For Material Sciences: Methods, Recent Developments

By Technical Paper Link - 10 Jun, 2022 - Comments: 0

New technical paper titled "Recent advances and applications of deep learning methods in materials science" from researchers at NIST, UCSD, Lawrence Berkeley National Laboratory, Carnegie Mellon University, Northwestern University, and Columbia University. Abstract "Deep learning (DL) is one of the fastest-growing topics in materials data science, with rapidly emerging applications spanning... » read more

Hybrid Method For More Reliable Virtual Sensors Within Vehicle Dynamics Control Systems

By Technical Paper Link - 25 May, 2022 - Comments: 0

New technical paper titled "Ensuring the Reliability of Virtual Sensors Based on Artificial Intelligence within Vehicle Dynamics Control Systems" from University of Duisburg-Essen. Abstract "The use of virtual sensors in vehicles represents a cost-effective alternative to the installation of physical hardware. In addition to physical models resulting from theoretical modeling, artificial in... » read more

Deep Learning In Industrial Inspection

By Ed Sperling - 24 May, 2022 - Comments: 0

Deep learning is at the upper end of AI complexity, sifting through more data to achieve more accurate results. Charlie Zhu, vice president of R&D at CyberOptics, talks about how DL can be utilized with inspection to identify defects in chips that are not discernible by traditional computer vision algorithms, classifying multiple objects simultaneously from multiple angles and taking into accou... » read more

New End Markets, More Demand For Complex Chips

By Ed Sperling - 16 May, 2022 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss economic conditions and how that affects chip design with Anirudh Devgan, president and CEO of Cadence; Joseph Sawicki, executive vice president of Siemens EDA; Niels Faché, vice president and general manager at Keysight; Simon Segars, advisor at Arm; and Aki Fujimura, chairman and CEO of D2S. This discussion was held in front... » read more

Improving PPA With AI

By John Koon - 12 May, 2022 - Comments: 0

AI/ML/DL is starting to show up in EDA tools for a variety of steps in the semiconductor design flow, many of them aimed at improving performance, reducing power, and speeding time to market by catching errors that humans might overlook. It's unlikely that complex SoCs, or heterogeneous integration in advanced packages, ever will be perfect at first silicon. Still, the number of common error... » read more

Artificial intelligence deep learning for 3D IC reliability prediction

By Technical Paper Link - 25 Apr, 2022 - Comments: 0

New research from National Yang Ming Chiao Tung University, National Center for High-Performance Computing (Taiwan), Tunghai University, MA-Tek Inc, and UCLA. Abstract "Three-dimensional integrated circuit (3D IC) technologies have been receiving much attention recently due to the near-ending of Moore’s law of minimization in 2D IC. However, the reliability of 3D IC, which is greatly infl... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.

by Ed Sperling

tag: deep learning