tag: degradation

Reliability On The Rise In IC Design
By Andre Lange - 14 Sep, 2023 - Comments: 0

Reliability has been an important factor in the semiconductor industry for decades. A closer look reveals three main priorities: In the area of technology development and optimization, the microscopic mechanisms that lead to degradation must be identified and understood before they can be fixed. Microanalytical methods are used here as well as TCAD simulations. If it’s not possible to... » read more

Search Based Method For Identifying Aging Model Parameters
By Technical Paper Link - 24 Jun, 2023 - Comments: 0

A technical paper titled “Leveraging Public Information to Fit a Compact Hot Carrier Injection Model to a Target Technology” was published by researchers at University of Victoria. Abstract: "The design of countermeasures against integrated circuit counterfeit recycling requires the ability to simulate aging in CMOS devices. Electronic design automation tools commonly provide this ability... » read more

NBTI & PBTI of MOSFETs
By Technical Paper Link - 30 May, 2022 - Comments: 0

Technical paper titled "Bias Temperature Instability of MOSFETs: Physical Processes, Models, and Prediction" from researchers at Liverpool John Moores University. Abstract "CMOS technology dominates the semiconductor industry, and the reliability of MOSFETs is a key issue. To optimize chip design, trade-offs between reliability, speed, power consumption, and cost must be carried out. This r... » read more

Ensuring HBM Reliability
By Ed Sperling - 27 May, 2020 - Comments: 0

Igor Elkanovich, CTO of GUC, and Evelyn Landman, CTO of proteanTecs, talk with Semiconductor Engineering about difficulties that crop up in advanced packaging, what’s redundant and what is not when using high-bandwidth memory, and how continuous in-circuit monitoring can identify potential problems before they happen. » read more

Degradation Monitoring
By proteanTecs - 09 Mar, 2020 - Comments: 0

This paper describes a reliability degradation modeling and monitoring method based on a combination of IC novel embedded circuits (Agents), and off-chip machine learning algorithms which infer the digital readouts of these circuits during test and operational lifetime. Together, they monitor the margin degradation of an IC, as well as other vital parameters of the IC and its environmental s... » read more

Reliability In Automotive Chips
By Ed Sperling - 17 Feb, 2020 - Comments: 0

Roland Jancke, head of department for design methodology at Fraunhofer IIS’ Engineering of Adaptive Systems Division, looks at how to ensure that chips used in cars are reliable over extended periods of use, how mission profiles vary depending upon where they are used, and why it’s important to understand what chips developed at the latest nodes can really be used for and how they will be ... » read more

How Chips Age
By Ed Sperling - 20 Jan, 2020 - Comments: 1

Andre Lange, group manager for quality and reliability at Fraunhofer IIS’ Engineering of Adaptive Systems Division, talks about circuit aging, whether current methods of predicting reliability are accurate for chips developed at advanced process nodes, and where additional research is needed. » read more

Symptoms Of SoC Electromagnetic (EM) Crosstalk
By Anand Raman - 14 Feb, 2018 - Comments: 0

By Anand Raman and Magdy Abadir Have you ever had your silicon demonstrate unexpected behavior? Have you ever found unexplainable design failure or performance degradation? A number of issues could be the culprit - from overloaded signal nets, a noisy power grid, or increasing temperature - but one problem often overlooked is electromagnetic (EM) crosstalk. Electromagnetic (EM) crosstal... » read more

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