Designing For Extreme Low Power


There are several techniques available for low power design, but whenever a nanowatt or picojoule matters, all available methods must be used. Some of the necessary techniques are different from those used for high-end designs. Others have been lost over time because their impact was considered too small, or not worth the additional design effort. But for devices that last a lifetime on a si... » read more

Power Impact At The Physical Layer Causes Downstream Effects


Data movement is rapidly emerging as one of the top design challenges, and it is being complicated by new chip architectures and physical effects caused by increasing density at advanced nodes and in multi-chip systems. Until the introduction of the latest revs of high-bandwidth memory, as well as GDDR6, memory was considered the next big bottleneck. But other compute bottlenecks have been e... » read more

Data Center Scaling Requires New Interface Architectures


You can pick your favorite data points, but the bottom line is global data traffic is growing at an exponential rate driven by a confluence of megatrends. 5G networks are making possible billions of AI-powered IoT devices untethered from wired networks. Machine learning’s voracious appetite for enormous data sets is skyrocketing. Data intensive video streaming for both entertainment and busin... » read more

Benefits Of In-Chip Thermal Sensing


The latest SoCs on advanced semiconductor nodes typically include a fabric of sensors spread across the die, and for good reason. But why and what are the benefits? This first blog of a three-part series explores some of the key applications for in-chip thermal sensing and why embedding in-chip monitoring IP is an essential step to maximize performance and reliability and minimize power, or a... » read more

2.5D Architecture Answers AI Training’s Call for “All of the Above”


The impact of AI/ML grows daily impacting every industry and touching the lives of everyone. In marketing, healthcare, retail, transportation, manufacturing and more, AI/ML is a catalyst for great change. This rapid advance is powerfully illustrated by the growth in AI/ML training capabilities which have since 2012 grown by a factor of 10X every year. Today, AI/ML neural network training mod... » read more

Software-Defined Hardware Gains Ground — Again


The traditional approach of running generic software on x86-based CPUs is running out of steam for many applications due to the slowdown of Moore’s Law and the concurrent exponential growth in software application complexity and scale. In this environment, the software and hardware are disparate due the dominance of the x86 architecture. “The need for and advent of the hardware accelerat... » read more

Moving To GAA FETs


How do you measure the size of a transistor? Is it the gate length, or the distance between the source and drain contacts? For planar transistors, the two values are approximately the same. The gate, plus a dielectric spacer, fits between the source and drain contacts. The contact pitch, limited by the smallest features that the lithography process can print, determines how many transistors ... » read more

Moore And More


For more than 50 years, the semiconductor industry has enjoyed the benefits of Moore's Law — or so it seemed. In reality, there were three laws rolled up into one: Each process generation would have a higher clock speed at the same power. This was not discovered by Moore, but by Dennard, who also invented the DRAM. Process generations continue to get faster and lower power, but the power... » read more

Moore’s Law, Supply Chains And Security


The debate about the future of Moore's Law continues, while other parts of the industry look for alternatives. In between, supply chains are being pulled in multiple directions, with safety and security often in the middle. All across the semiconductor industry, significant changes are underway. Some of these have been in the works for some time. Others are new or accelerating faster than an... » read more

Interdependencies Complicate IC Power Grid Design


Creating the right power grid is a growing problem in leading-edge chips. IP and SoC providers are spending a considerable amount of time defining the architecture of logic libraries in order to enable different power grids to satisfy the needs of different market segments. The end of Dennard scaling is one of the reasons for the increased focus. With the move to smaller nodes, the amount of... » read more

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