tag: DFT

Smarter DFT Infrastructure And Automation Emerge As Keys To Managing DFT Design Scaling
By Ron Press - 21 Dec, 2017 - Comments: 0

By Ron Press and Vidya Neerkundar The reality of DFT for large and complex SoCs has introduced new risk into design schedules. DFT teams end up in the critical path to tape out while waiting for portions of the design to be complete, and there are more DFT integration steps than ever before. The traditional approaches to DFT work on huge designs pose problems of repeatability and reliability... » read more

Changes Ahead For Test
By Jeff Dorsch - 11 Dec, 2017 - Comments: 0

Testing microprocessors is becoming more difficult and more time consuming as these devices are designed to take on more complex tasks, such as accelerating artificial intelligence computing, enabling automated driving, and supporting deep neural networks. This is not just limited to microprocessors, either. Graphics processing units are grabbing market share in supercomputing and other area... » read more

Effective Management Of System Designs
By Ranjit Adhikary - 08 Nov, 2017 - Comments: 0

With the advent of the Internet-of-Things (IoT), system designs are slowly but surely becoming more complex. They now use heterogeneous architectures both on the System-on-Chip (SoC) and within a package. These systems typically have multiple different CPU cores, hardware accelerators, memories, network-on-chip (NoC) fabrics and numerous peripheral interfaces. Now, add to this the complexiti... » read more

Tech Talk: eFPGA Test
By Ed Sperling - 07 Sep, 2017 - Comments: 0

Volkan Oktem, director of product applications at Achronix, explains how to design a test approach for embedded FPGAs, including how to plan for sufficient coverage and how much it will cost. https://youtu.be/aGXd8QH-BfY   Related Stories Tech Talk: EFPGA Acceleration When and why to use embedded FPGAs. » read more

Time For Massively Parallel Testing
By Jeff Dorsch - 12 Apr, 2017 - Comments: 0

Time is money in electronics, as in other industries, and the more time that is invested in testing chips means more costs being added to the product in question. To speed up testing for memory devices and other semiconductors, test equipment vendors have resorted to parallel testing technology, simultaneously testing multiple chips at a time. The industry also is turning to system-level tes... » read more

Biz Talk: ASICs
By Ed Sperling - 27 Mar, 2017 - Comments: 0

eSilicon CEO [getperson id="11145" comment="Jack Harding"] talks about the future of scaling, advanced packaging, the next big things—automotive, deep learning and virtual reality—and the need for security. [youtube vid=leO8gABABqk]   Related Stories Executive Insight: Jack Harding (Aug 2016) eSilicon’s CEO looks at industry consolidation, competition, China’s impact, an... » read more

What Is Portable Stimulus?
By Brian Bailey - 23 Mar, 2017 - Comments: 0

When [getentity id="22028" e_name="Accellera"] first formed the [getentity id="22863" comment="Portable Stimulus Working Group”] and gave it that name, I was highly concerned. I expressed my frustration that the name, while fitting with what most people thought [getkc id="10" kc_name="verification"] is about, does not reflect the true nature of the standard being worked on. In short, it is no... » read more

Better Code With RTL Linting And CDC Verification
By Sergei Zaychenko - 23 Feb, 2017 - Comments: 0

Automated design rule checking, or linting, has been around in RTL verification for at least a couple decades, yet still many HDL designers completely ignore this simple yet very powerful bug hunting method. Why would a busy designer need to run this annoying warning generator? The hostility against using conventional linting tools is often explained by the enormous amount of output noise, limi... » read more

Emulation’s Footprint Grows
By Brian Bailey - 27 Oct, 2016 - Comments: 0

It wasn't that many years ago that [getkc id="30" comment="emulation"] was an expensive tool available to only a few, but it has since become indispensable for a growing number of companies. One obvious reason is the growing size of designs and the inability of [getkc id="11" kc_name="simulation"] to keep up. But emulation also has been going through a number of transformations that have made i... » read more

Moving Automotive Test Into The Analog Domain
By Steve Pateras - 29 Sep, 2016 - Comments: 0

The amount of electronic content in passenger cars continues to grow rapidly, driven mainly by the integration of various advanced safety features. The industry’s move towards fully autonomous vehicles promises to even further increase the number of these safety features and consequentially, the electronic content required in each vehicle. Recent reports indicate that hundreds of semicondu... » read more

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