Luminary Panel Sees Progress In EUV Pellicle Adoption As Critical For EUV


A significant focus of the 2024 SPIE Photomask and EUV conference was on EUV lithography and high-numerical-aperture (high-NA) EUV lithography, offering the potential to drive resolution to new heights. These EUV solutions bring new challenges such as pellicles, mask inspection, and smaller and smaller minimum mask dimensions. Progress has been impressive, according to lithography luminary Dr. ... » read more

Luminary Panel Sees Multi-Beam Mask Writers And Curvilinear Masks Key To 193i And EUV


Attendance was up and the mood was optimistic at this year’s SPIE Photomask and EUV conference held September 29 through October 3, 2024. The optimism was apparent as well for multi-beam mask writers and curvilinear masks during the eBeam Initiative’s 15th annual reception and meeting held on October 1. In the eBeam Initiative’s annual Luminaries survey, 93% of those surveyed said that pu... » read more

For The Love Of Theatre And Mask-Making


Naoya Hayashi has been a friend and important contributor to the eBeam Initiative from our start over 13 years ago. We’re just one of the many interests he has embraced and championed over his 45 year career at DNP. Now it’s our turn to embrace him and thank him for the wonderful memories as he pursues his next chapter after retiring as the first research fellow from DNP this June. Aki Fuji... » read more

Photomask Shortages Grow At Mature Nodes


A surge in demand for chips at mature nodes, coupled with aging photomask-making equipment at those geometries, are causing significant concern across the supply chain. These issues began to surface only recently, but they are particularly worrisome for photomasks, which are critical for chip production. Manufacturing capacity is especially tight for photomasks at 28nm and above, driving up ... » read more

Unsolved Issues In Next-Gen Photomasks


Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

Photomask Challenges At 3nm And Beyond


Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

Business, Technology Challenges Increase For Photomasks


Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

Week In Review: Manufacturing, Test


Semicon West news The Semicon West trade show opened this week with a hybrid in-person and virtual event. Several companies introduced new products or made announcements at Semicon. Some announcements coincided with the show. At Semicon, Lam Research introduced the Syndion GP, a new product that provides deep silicon etch capabilities to chipmakers developing next-generation power devices a... » read more

Week In Review: Manufacturing, Test


Packaging Amkor plans to build a packaging plant in Bac Ninh, Vietnam. The first phase of the new factory will focus on providing system-in-package (SiP) assembly and test services for customers. The investment for the first phase of the facility is estimated to be between $200 million and $250 million. “This is a strategic, long-term investment in geographical diversification and factory... » read more

Week In Review: Manufacturing, Test


Chipmakers and OEMs IBM has unveiled what the company says is the world’s first 2nm chip. The device is based on a next-generation transistor architecture called a nanosheet FET. The nanosheet FET is an evolutionary step from finFETs, which is today’s state-of-the-art transistor technology. Targeted for 2024, IBM’s 2nm chip features a novel multi-Vt scheme, a 12nm gate length, and a n... » read more

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