The Pitfalls Of Auto-Stitching In Double-Patterning

By David Abercrombie - 22 Sep, 2016 - Comments: 0

Ever since the first double-pattern (DP) odd-cycle error ring was produced on a layout, designers have longed for a magic solution to solve it. Traditionally, the first approach to fixing an odd-cycle error was to move a polygon or a polygon edge to increase spacing to an adjoining polygon in the cycle. Alternatively, you could remove a polygon altogether, or split it into two pieces. All of th... » read more

Time To Pay The Piper

By Brian Bailey - 28 Jul, 2016 - Comments: 3

The Pied Piper of Hamelin is a German fable about a rat catcher who used his magic pipe to lure away rats. When he was not paid by the town, he used his pipe to lure away all of the town's children. I am not suggesting that exactly the same is true for the semiconductor industry and having not paid [getkc id="7" kc_name="EDA"], but I do not think they have paid enough and they will now have to ... » read more

Colorless vs. Colored Double-Patterning Design Flows

By David Abercrombie - 21 Jul, 2016 - Comments: 0

Colored vs. Colorless double patterning design flows—do you know which one is best for your design? What options does your foundry allow? Do you debug one differently from the other? In this short video, I’ll demonstrate the differences between colored and colorless DP design flows, and explain the options and potential pitfalls of each approach. With a better understanding of how to design... » read more

Bulk CMOS Vs. FD-SOI

By Mark LaPedus - 19 May, 2016 - Comments: 2

The leading edge of the chip market increasingly is divided over whether to move to finFETs or whether to stay at 28nm using different materials and potentially even advanced packaging. Decisions about which approach to take frequently boil down to performance, power, form factor, cost, and the maturity of the individual technologies. All of those can vary by market, by vendor and by process... » read more

ECOs and Multi-Patterning: It Can Be Done

By David Abercrombie - 21 Apr, 2016 - Comments: 0

By David Abercrombie and Alex Pearson A lot has been written and discussed about how to decompose (color) layouts for advanced process nodes that require multipatterning (MP). However, one topic that has been sorely ignored is how to efficiently make changes to designs that are already colored, or even taped out and processed. We tend to act like all designs work out the first time through... » read more

When And How Should I Color My DP layout?

By David Abercrombie - 18 Feb, 2016 - Comments: 0

Designers working with advanced process technologies that require double patterning often find themselves puzzling over the best way to setup or optimize their design flows to ensure their layouts can be decomposed without time-wasting mistakes. Because manual coloring can be challenging even for experienced engineers, many prefer to use automated coloring solutions. But when is the best time a... » read more

Predictions For 2016: Semiconductors, Manufacturing And Design

By Brian Bailey - 21 Jan, 2016 - Comments: 0

Seventeen companies sent in their predictions for this year with some of them sending predictions from several people. This is in addition to the CEO predictions that were recently published. That is a fine crop of views for the coming year, especially since they know that they will be held accountable for their views and this year, just like the last, they will have to answer for them. We beli... » read more

Tech Talk: Double-Triple Patterning

By Brian Bailey - 21 Jan, 2016 - Comments: 0

Mentor Graphics' David Abercrombie shows the differences and challenges in double patterning versus triple patterning. [youtube vid= e0wZmjBbEf0] » read more

When Order Matters

By Mentor, a Siemens Business - 17 Dec, 2015 - Comments: 0

Debugging DP errors can be not only time-consuming, but also frustrating, when new errors seem to appear out of nowhere. The order in which you address DP errors can make a significant difference in the efficiency of your debug efforts. Learning the sequence of ordered DP debugging explained in this white paper can not only help you reduce the time you spend analyzing and fixing DP errors, but ... » read more

Resetting Expectations On Multi-Patterning Decomposition And Checking

By David Abercrombie - 17 Dec, 2015 - Comments: 0

As I said in Part 1 of this topic, it never ceases to amaze me how much confusion and misunderstanding there is when it comes to multi-patterning (MP) decomposition and checking. That entire first article only focused on the typical subjects I’ve had to discuss with customers regarding double-patterning (DP). I have to tell you that with the deployment of triple-patterning (TP) and quadruple-... » read more

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tag: double patterning

The Pitfalls Of Auto-Stitching In Double-Patterning

Time To Pay The Piper

Colorless vs. Colored Double-Patterning Design Flows

Bulk CMOS Vs. FD-SOI

ECOs and Multi-Patterning: It Can Be Done

When And How Should I Color My DP layout?

Predictions For 2016: Semiconductors, Manufacturing And Design

Tech Talk: Double-Triple Patterning

When Order Matters

Resetting Expectations On Multi-Patterning Decomposition And Checking

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