Replacement Gate High-k/Metal Gate nMOSFETs Using A Self-Aligned Halo-Compensated Channel Implant

By UMC - 16 Jun, 2021 - Comments: 0

A device design technique for boosting output resistance (Rout) characteristics of long-channel halo-doped nMOSFETs for replacement gate (RMG) high-k/metal gate (HK/MG) devices is proposed based on numerical simulations. We show that the self-aligned halo-compensated channel implant (HCCI) that is carried out after dummy poly gate removal provides compensation for the conventional halo doping. ... » read more

The Advantages Of FD-SOI Technology

By Michael Hargrove - 18 Jan, 2018 - Comments: 0

If my memory serves me well, it was at the 1989 Device Research Conference where the potential merits of SOI (Silicon on Insulator) technology were discussed in a heated evening panel discussion. At that panel discussion, there were many advocates for SOI, as well as many naysayers. I didn’t really think more about SOI technology until the mid-nineties, when I was sitting in a meeting where t... » read more

FinFET Impacts For Reducing Physical IP Power Consumption

By Navraj Nandra - 07 Nov, 2013 - Comments: 0

FinFET devices were developed to address the need for improved gate control to suppress leakage current (IOFF); DIBL (drain-induced barrier lowering); and process‐induced variability below 32-nanometer. FinFET technology is now in volume production. To fully realize the advantages of FinFET devices, physical IP must follow the same trajectory that has benefited digital design. That include... » read more

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tag: drain-induced barrier lowering

Replacement Gate High-k/Metal Gate nMOSFETs Using A Self-Aligned Halo-Compensated Channel Implant

The Advantages Of FD-SOI Technology

FinFET Impacts For Reducing Physical IP Power Consumption