Dynamic Flash Memory with Dual Gate Surrounding Gate Transistor (SGT)


Abstract: "This paper proposes an ultra-scaled memory device, called `Dynamic Flash Memory (DFM)'. With a dual-gate Surrounding Gate Transistor (SGT), a capacitorless 4F2 cell can be achieved. Similar to DRAM [1], refresh is needed, but high speed block refresh can improve the duty ratio. Analogous to Flash [2], three fundamental operations of “0” Erase, “1” Program, and Read are nee... » read more

Servers And The Drive to DDR5


This IDC Technology Spotlight Study, sponsored by Rambus, discusses server demands on DRAM and different workloads. DRAM must dynamically adjust to the needs of these disparate workloads. The history of dynamic random-access memory (DRAM) is characterized by the ability of the technology to adapt to the increasingly specialized real-time memory requirements of the applications that utilize it. ... » read more

Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology


Abstract: "Emerging applications such as deep neural network demand high off-chip memory bandwidth. However, under stringent physical constraints of chip packages and system boards, it becomes very expensive to further increase the bandwidth of off-chip memory. Besides, transferring data across the memory hierarchy constitutes a large fraction of total energy consumption of systems, and the ... » read more

What’s Ahead For DRAM, NAND?


For the last year, the semiconductor industry has been in the midst of a boom cycle. But if you look close enough, there are mixed signals in the market, especially in memory. Still, it’s a banner year for semiconductors. In total, the semiconductor market is expected to grow by 18.1% in 2021, according to Semico Research. That compares to 6.6% growth in 2020, according to Semico. Today... » read more

Servers And The Drive To DDR5


This IDC Technology Spotlight Study, sponsored by Rambus, discusses server demands on DRAM and different workloads. DRAM must dynamically adjust to the needs of these disparate workloads. The history of dynamic random-access memory (DRAM) is characterized by the ability of the technology to adapt to the increasingly specialized real-time memory requirements of the applications that utilize it. ... » read more

Lowering Energy Per Bit


Energy is emerging as a focal point in chip and system design, but solving energy-related issues needs to be dealt with on a much broader scale than design teams typically see. Energy is the amount of power consumed over a period of time to perform a given task, but reducing energy is a lot different than reducing power. It affects everything from operational costs and system performance to ... » read more

Micron D1α, The Most Advanced Node Yet On DRAM


Finally, we got to see D1α DRAM generation! It’s 14nm! After a quick viewing of the Micron D1α die (die markings: Z41C) and its cell design, we have determined its actual technology node (design rule), in contrast to the claims of market literature. It is the most advanced technology node ever on DRAM, and it is the first sub-15nm cell integrated DRAM product. The Micron Z41C die removed... » read more

PF-DRAM: A Precharge-Free DRAM Structure


Authors: Nezam Rohbani † (IPM); Sina Darabii § (Sharif); Hamid Sarbazi-Azad † i §(Sharif / IPM): † School of Computer Science, Institute for Research in Fundamental Sciences (IPM), Tehran, Iran § Department of Computer Engineering, Sharif University of Technology, Tehran, Iran Abstract: "Although DRAM capacity and bandwidth have increased sharply by the advances in technology ... » read more

Accelerating AI/ML Inferencing With GDDR6 DRAM


The origins of graphics double data rate (GDDR) memory can be traced to the rise of 3D gaming on PCs and consoles. The first graphics processing units (GPU) packed single data rate (SDR) and double data rate (DDR) DRAM – the same solution used for CPU main memory. As gaming evolved, the demand for higher frame rates at ever higher resolutions drove the need for a graphics-workload specific me... » read more

Is There a Practical Test For Rowhammer Vulnerability?


Rowhammer is proving to be a difficult DRAM issue to fix. While efforts continue to mitigate or eliminate the effect, no solid solution has yet made it to volume production. In addition, more aggressive process nodes are expected to exacerbate the problem. In the absence of a fix, then, testing may be one way to give DRAM manufacturers and users some way to segregate devices that are more su... » read more

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