tag: DVCon

Verification Facing Unique Inflection Point
By Brian Bailey - 10 Mar, 2016 - Comments: 0

The Design and Verification Conference and Exhibition (DVCon) attracted more than 1,100 people to San Jose last week, just slightly less than last year. While a lot of focus, and most of the glory, goes to design within semiconductor companies, it is verification where most of the advancements are happening and thus the bigger focus for DVCon. The rate of change in verification and the producti... » read more

Powerful New Standard
By Brian Bailey - 02 Mar, 2016 - Comments: 1

In December 2015, the IEEE released the latest version of the 1801 specification, titled the IEEE standard for design and verification of low-power integrated circuits, but most people know it as UPF or the Unified Power Format. The standard provides a way to specify the power intent associated with a design. With it, a designer can define the various power states of the design and the contexts... » read more

Blog Review: Feb. 10
By Jesse Allen - 10 Feb, 2016 - Comments: 0

You could be flying on a hybrid plane that uses hydrogen fuel cells in the future, and might even be able to hear the loudspeaker announcements while waiting for the flight, in this week's top tech picks from Ansys' Justin Nescott. Plus, smart soccer balls. Thermal is the new power, argues Cadence's Paul McLellan, and when it comes to SoCs treating thermal analysis as an afterthought is no l... » read more

Still Time to Blow Up UVM
By Neil Johnson - 28 Jan, 2016 - Comments: 2

Blowing up UVM is something I ran on my own blog a few years ago. Considering not much has changed with respect to UVM – that it continues to dominate verification circles – I figured it’s a discussion worth re-starting. In my mind, it’s not too late to take a few steps forward by blowing up UVM. A little history… the idea to blow up UVM was motivated by a slide snapshot posted to ... » read more

The Week In Review: Design/IoT
By Jesse Allen - 15 Jan, 2016 - Comments: 0

Tools Rambus' Cryptography Research Division uncorked a new security platform for protecting and sharing 4K UHD and high dynamic range programming. It allows consumers to store, copy and share digital content across multiple devices, while also protecting the content from theft. Included are a secure core, a software player, and trusted key provisioning. Deals Arrow and Cadence announc... » read more

Blog Review: Sept. 30
By Jesse Allen - 30 Sep, 2015 - Comments: 0

In an increasingly networked world, NXP's Lars Reger advocates for a change of perspective: one which places data protection and the security of end customers and users at the heart. Differential power analysis has been on the mind of Rambus' Aharon Etengoff recently as increasing numbers of SIM cards are being cracked, plus some counter measures that can be used. Even wondered about the ... » read more

The Week In Review: Design/IoT
By Jesse Allen - 28 Aug, 2015 - Comments: 0

M&A Tessera boosted its 2.5D and 3D-IC capabilities with the acquisition of Ziptronix. The $39 million cash purchase adds a low-temperature wafer bonding technology platform, which has been licensed to Sony for volume production of CMOS image sensors. Numbers Semico Research forecasts that the SoC market will approach $200 billion by 2019. According to its analysis, average die are... » read more

Top 15 Integrating Points In The Continuum Of Verification Engines
By Frank Schirrmeister - 30 Jul, 2015 - Comments: 0

The integration game between the different verification engines, dynamic and static, is in full swing. Jim Hogan talked about the dynamic engines that he dubbed “COVE”, and I recently pointed out a very specific adoption of COVE in my review of some customer examples at DAC 2015 in “Use Model Versatility Is Key for Emulation Returns on Investment”. Here are my top 15 integrating poin... » read more

Is Art Acceptable In Verification?
By Brian Bailey - 23 Apr, 2015 - Comments: 0

The industry appears to have accepted that [getkc id="10" kc_name="verification"] involves art as well as science. This is usually based on one of three reasons, namely: the problem is large and complex; there is a lack of understanding and tools that enable it to be automated; and if it could be made a science, all of the jobs would have migrated offshore. Today, designs are built from pre-... » read more

Tech Talk: Virtual Prototyping
By Brian Bailey - 22 Apr, 2015 - Comments: 0

Bill Neifert, CTO of Carbon Design Systems, talks with about the intersection of IP and EDA, driven in particular by ARM's new architecture. [youtube vid=1OopYWmRarE] » read more

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