Executive Insight: Lip-Bu Tan

By Ed Sperling - 01 Oct, 2015 - Comments: 1

Lip-Bu Tan, president and CEO of Cadence, sat down with Semiconductor Engineering to talk about consolidation, Moore's Law, and where the opportunities are in the IoT and automotive markets. What follows are excerpts of that conversation. SE: What are the big concerns for the semiconductor industry in general, and EDA in particular? Tan: Top on my list is all the consolidation that's goin... » read more

EDA, IP Numbers Up

By Ed Sperling - 28 Sep, 2015 - Comments: 0

EDA and IP numbers increased another 8.5% in Q2, with all regions but Japan showing positive growth. Total revenue was $1.91 billion for the quarter, up from $1.76 billion in Q2 of 2014. The largest category, computer-aided engineering, was $657.2 million for the quarter, up 9.6% compared with the same period last year. IC physical design was $379.2 million, up 6% year over year, and IP was ... » read more

Is The 2.5D Supply Chain Ready?

By Ed Sperling - 28 Sep, 2015 - Comments: 0

A handful of big semiconductor companies began taking the wraps off 2.5D and fan-out packaging plans in the past couple of weeks, setting the stage for the first major shift away from Moore's Law in 50 years. Those moves coincide with reports of commercial [getkc id="82" kc_name="2.5D"] chips from chip assemblers and foundries that are now under development. There have been indications for... » read more

Is HW Or SW Running the Show?

By Brian Bailey - 24 Sep, 2015 - Comments: 1

In the past, hardware was designed and then passed over to the software team for them to add their contribution to the product. This worked when the amount of software content was small and the practice did not significantly contribute to product delays. Over time, the software content grew and today it is generally accepted that software accounts for more product expense than hardware, takes l... » read more

Tech Talk: SoC Protocol Debug

By Ed Sperling - 24 Sep, 2015 - Comments: 0

Bernie DeLay, group director for verification IP R&D at Synopsys, talks about what goes wrong in complex SoCs, how so-called standard pieces play together, and where are the gotchas in re-use. [youtube vid=AaY_AmdjUpo] » read more

What ESL Is Really About

By Brian Bailey - 24 Sep, 2015 - Comments: 1

There has been an almost constant disagreement between the generally held view about what ESL is and my own views on the subject. It is not completely surprising, given that I have spent most of my time as a verification specialist working within the EDA industry. EDA has been driven by design, and all of the largest EDA companies grew out of advances on the design side. [getkc id="10" kc_na... » read more

The Price Of Consolidation

By Ed Sperling - 24 Sep, 2015 - Comments: 0

Consolidation is causing far-reaching changes across the global semiconductor ecosystem due to the size of companies being bought and the dearth of startups to replenish those being acquired. Coupled with the rising cost and difficulty of shrinking features down to advanced process nodes—many argue that is the largest driver of consolidation—the market dynamics for who's buying IP, EDA t... » read more

ESL: 20 Years Old, 10 To Go

By Brian Bailey - 23 Sep, 2015 - Comments: 2

It is a common perception that the rate of technology adoption accelerates. In 1873, the telephone was invented and, after 46 years, it had been adopted by one-quarter of the U.S. population. Television, invented in 1926 took 26 years. The PC in 1975 took just 16 years. It took only 7 years after the introduction of the Internet in 1991 before it was seeing significant levels of adoption. So... » read more

Mentor Buys Remainder Of Calypto

By Brian Bailey - 17 Sep, 2015 - Comments: 0

Back in 2002, a small startup company decided to tackle one of the most difficult problems in EDA—one that, if solved, could have opened up a whole new level of abstraction. Back when [getkc id="29" kc_name="logic synthesis"] was the new tool to try out, it suffered from the fact that gate-level [getkc id="11" kc_name="simulation"] had to be performed on the output, even if the input had been... » read more

Tech Talk: Power Emulation

By Ed Sperling - 10 Sep, 2015 - Comments: 0

Jean-Marie Brunet, marketing director for Mentor Graphics' Emulation Division, talks about why hardware-assisted verification is now required for power and where it works best. [youtube vid=Mb63cbjbZ_I] » read more

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