Back To The Future

By Ed Sperling - 02 Feb, 2015 - Comments: 0

The push to the next process node typically has meant that designs get simpler at existing and older nodes because the process technology is more mature and there have been so many chips developed at those nodes—many billions of them—that every possible corner case has been encountered hundreds, if not thousands, of times. That all makes sense in theory, but several key things have chang... » read more

New Market Expectations For 2015

By Brian Bailey - 29 Jan, 2015 - Comments: 0

This year more than 26 people provided predictions for 2015. Most of these came from the EDA industry, so the results may be rather biased. However, ecosystems are coming closer together in many parts of the semiconductor food chain, meaning that the EDA companies often can see what is happening in dependent industries and in the system design houses. Thus their predictions may have already res... » read more

First Look: 10nm

By Ed Sperling - 29 Jan, 2015 - Comments: 6

As the semiconductor industry begins grappling with mass production at 14/16nm process nodes, work is already underway at 10nm. Tools are qualified, IP is characterized, and the first test chips are being produced. It's still too early for production, of course—perhaps three years too early—but there is enough information being collected to draw at least some impressions about just how toug... » read more

IP MarketPlace – Act I

By Mike Gianfagna - 29 Jan, 2015 - Comments: 0

We did our first webinar for IP MarketPlace last week. Because there is such a vibrant roadmap for this rich IP exploration environment, I felt like this was merely the first act of a multi-part production. We kept our event to 30 minutes, which has been a hallmark of all our webinars. We began with a review of what IP MarketPlace is, how it works, and why it’s useful. We then proceeded to a ... » read more

Manufacturing And Packaging Changes For 2015

By Brian Bailey - 22 Jan, 2015 - Comments: 0

Blog Review: Jan. 14

By Ed Sperling - 14 Jan, 2015 - Comments: 0

Ansys' Bill Vandermark flags the top five engineering technology articles for the week, leaning heavily on CES. The 3D scanner is intriguing because of the link to 3D printing. Mentor's Robin Bornoff returns to the drawing board to design a better water heater. Unfortunately, you probably won't be able to find one of these in your local Home Depot—ever. eSilicon's Jack Harding defines w... » read more

Blog Review: Dec. 31

By Ed Sperling - 31 Dec, 2014 - Comments: 0

Mentor's J. VanDomelen zeroes in on the two most interesting discoveries from the Philae comet landing. So what was that "eerie cyclical clicking" sound? Synopsys' Ray Varghese digs into basic coherent transaction testing for AXI/ACE compliant interconnects. You might want to put on another pot of coffee. Cadence's Brian Fuller offers some deep insights into synthesis, verification and te... » read more

Industry Scorecard For 2014

By Brian Bailey - 18 Dec, 2014 - Comments: 0

At the end of last year, Semiconductor Engineering asked the industry about the developments they expected to see in 2014. If you care to refresh your memory, they were categorized under markets, semiconductors and development tools. Now it is time to look back and see how accurate those predictions were and where they fell short. Markets The obvious trend, at the beginning of the year, wa... » read more

Trouble Spots And Optimism For 2015

By Ed Sperling - 18 Dec, 2014 - Comments: 0

Most top executives in the semiconductor industry are bullish about 2015 and even beyond, particularly as the [getkc id="76" comment="Internet of Things"] begins to drive new markets and market mash-ups, and as more semiconductors find their way into markets such as automotive, health-care and manufacturing. But it's not an entirely rosy picture, and top executives point to potential trouble sp... » read more

Is The Stacked Die Ecosystem Stagnating?

By Ann Mutschler - 18 Dec, 2014 - Comments: 2

It is now widely agreed that not much has been happening in terms of adoption for 2.5D interposer and 3D ICs. “It seems like everyone is still at the starting line waiting for the race to begin," said Javier DeLaCruz, senior director of engineering of [getentity id="22242" e_name="eSilicon"]. "Interposer assembly and IP availability for effectively using the [getkc id="82" comment="2.5D IC... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.