New approaches to preventing counterfeiting across the supply chain.
Rising costs, complexity, and fuzzy delivery schedules are casting a cloud over next-gen lithography.
Challenges range from constant security updates to expected lifetimes that last beyond the companies that made them.
Experts at the Table: The challenges of putting EUV into production, and why DRAM will require advanced litho in the future.
Building together a verification approach for safety and security in automotive chips is complex, multi-faceted, and extremely difficult.
New data suggests that more chips are being forced to respin due to analog issues.
The number of options is increasing, but tooling and methodologies haven’t caught up.
Big investment in EV, batteries, and data center chips as 26 companies raise $2.6B.
Adding monitors or traceability into an SoC is not new, but it is beginning to become a huge new opportunity across the entire silicon lifecycle.
Interconnects are becoming the limiter at advanced nodes.
Analysis: What’s driving the deal, and what to watch for.
The concept as it was originally conceived no longer applies. Here’s why.
Dynamic voltage and frequency scaling can save a lot of power and energy, but design costs can be high and verification difficult.
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