tag: EUV

One-on-One: Naoya Hayashi
By Mark LaPedus - 20 Mar, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the current and future challenges in the photomask industry with Naoya Hayashi, research fellow at Dai Nippon Printing (DNP). SE: What are the big challenges for the photomask industry today? Hayashi: There are several challenges. Most of the challenges involve mask complexity. It is also quite difficult to handle the mask data, because it is ... » read more

Advanced Lithography: Moore’s Law Moves On
By Marc David Levenson - 20 Mar, 2014 - Comments: 1

Every February, experts in nano patterning technologies converge in San Jose, Calif., to present their road maps, brainstorms and results at the SPIE Advanced Lithography Symposium. This year, there was more confusion than ever, partly the result of sessions in unlabeled (but beautiful) new ballrooms at the Convention Center, but mostly because of industry divergences. There is no longer a s... » read more

More Pain In More Places
By Ed Sperling - 14 Mar, 2014 - Comments: 2

Pain is nothing new in to the semiconductor industry. In fact, the pain of getting complex designs completed on budget, and finding the bugs in those designs, has been responsible for decades of continuous growth in EDA, IP, test, packaging, and foundries. But going forward there is change afoot in every segment of the flow from architecture to design to layout to verification to manufacturi... » read more

Next-Generation Lithography
By Ed Sperling - 04 Mar, 2014 - Comments: 0

Aki Fujimura, CEO of D2S, sat down with Semiconductor Engineering to talk about the challenges of moving to the next process nodes and how that will affect everything from lithography to the write time, size and cost of photomasks. [youtube vid=L96vi-BjhDU] » read more

Tech Talk: Multipatterning
By Brian Bailey - 03 Mar, 2014 - Comments: 2

Mentor Graphics' David Abercrombie shows how multi patterning is supposed to be done, and what sorts of problems can crop up along the way. Now that EUV has hit another hiccup, the semiconductor industry has little choice. [youtube vid=tOs_OMSh4Nk] » read more

The Week In Review: Manufacturing
By Mark LaPedus - 28 Feb, 2014 - Comments: 0

SPIE Advanced Lithography is a patterning show. At the event, however, Applied Materials revealed more details regarding its selective materials removal opportunity, according to Weston Twigg, an analyst with Pacific Crest Securities, in a research note. Applied Materials presented a paper entitled, “Where Is Plasma Etching Going from Here?” “The presenter outlined concepts for thin layer... » read more

The Final Deadline For EUV
By Ed Sperling - 27 Feb, 2014 - Comments: 5

When TSMC disclosed this week—in a public forum—that its production EUV lithography test had failed in one of the early test runs due to a power source issue, there were very different reactions. EUV, after all, is an emotional issue with billions of dollars invested and lots of jobs riding on this technology. To begin with, there has been the usual spin control. The message essentially ... » read more

Time to mend the EE / CS divide
By Kurt Shuler - 27 Feb, 2014 - Comments: 0

There’s been a lot of news out the last few weeks about the future of our industry, and although these news flashes may seem unrelated, they are quite correlated. First, there was the disturbing news in Mark LaPedus’ article here on Semiconductor Engineering, “EUV Suffers New Setback,” portending a rough ride for the commercialization of EUV lithography. EUV will be needed to create ... » read more

EUV Suffers New Setback
By Mark LaPedus - 24 Feb, 2014 - Comments: 8

ASML Holding’s initial, production-worthy extreme ultraviolet (EUV) lithography tool has suffered a setback during a recent trial run at Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC). TSMC disclosed the problem during a public presentation at the 2014 Advanced Lithography conference in San Jose, Calif. During the trial run at TSMC, the EUV source crashed due to a misalignment of the l... » read more

Executive Insight: Luc Van den hove
By Mark LaPedus - 20 Feb, 2014 - Comments: 1

Semiconductor Engineering sat down to discuss current and future process technology challenges with Luc Van den hove, president and chief executive of Imec. What follows are excerpts of that conversation. SE: The industry is simultaneously working on several new and expensive technologies. This includes extreme ultraviolet (EUV) lithography and the next-generation 450mm wafer size. The indu... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy