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Week In Review: Design, Low Power


The CXL Consortium published the Compute Express Link 2.0 specification. CXL is an interconnect that maintains memory coherency between the CPU memory space and memory on attached devices. CXL 2.0 adds support for switching for fan-out to connect to more devices, memory pooling for increased memory utilization efficiency and providing memory capacity on demand, and support for persistent memory... » read more

Week In Review: Manufacturing, Test


Trade and government The U.S. continues to tighten its export controls for hi-tech, including a move to restrict fab technologies that enable 5nm chip production. The U.S. Department of Commerce has imposed controls on six more technologies, bringing the total to 37. They include: hybrid additive manufacturing/computer controlled tools; computational lithography software designed for EUV masks... » read more