A Comprehensive Study Of Integrating 2D Materials With CFET Architecture (SKKU, et al.)


A new technical paper, "Challenges and prospects of 2D electronics for future monolithic complementary field-effect transistors," was published by researchers at Sungkyunkwan University, Hanyang University, Istituto Italiano di Tecnologia, Shanghai University, Jeonbuk National University, and Kyonggi University. Abstract "With planar complementary metal-oxide-semiconductor (CMOS) scaling ... » read more

A Comparative Study With Horizontal and Verticals FETs (POSTECH, Georgia Tech)


A new technical paper titled "Vertical FET Optimization at Angstrom Nodes: A Comparative Study With Horizontal FET" was published by researchers at POSTECH and Georgia Institute of Technology. Abstract "For the first time, this study presents two novel vertical FET (VFET) structures and conducts a quantitative analysis to assess the competitiveness of VFET in comparison to two types of hori... » read more

Ultranarrow Semiconductor WS2 Nanoribbon FETs (Chalmers)


A new technical paper titled "Ultranarrow Semiconductor WS2 Nanoribbon Field-Effect Transistors" was published by researchers at Chalmers University of Technology. Abstract "Semiconducting transition metal dichalcogenides (TMDs) have attracted significant attention for their potential to develop high-performance, energy-efficient, and nanoscale electronic devices. Despite notable advancem... » read more

8-In-1 Reconfigurable Logic Gate (TU Dresden)


A technical paper titled “The RGATE: an 8-in-1 Polymorphic Logic Gate Built from Reconfigurable Field Effect Transistors” was published by researchers at TU Dresden and NaMLab. Abstract: "We present the hardware implementation of a reconfigurable universal logic gate, that we call RGATE, able to deliver up to eight different logic functionalities and based on a symmetric four-transistors... » read more

A Modelling Approach To Well-Known And Exotic 2D Materials For Next-Gen FETs


A technical paper titled “Field-Effect Transistors based on 2-D Materials: a Modeling Perspective” was published by researchers at ETH Zurich. Abstract: "Two-dimensional (2D) materials are particularly attractive to build the channel of next-generation field-effect transistors (FETs) with gate lengths below 10-15 nm. Because the 2D technology has not yet reached the same level of maturity... » read more

Integration Of Layered Semimetals With Conventional CMOS Platform


A technical paper titled “Layered semimetal electrodes for future heterogeneous electronics” was published by researchers at IIT Madras and Indian Institute of Science Education and Research. Abstract: "Integration of the emerging layered materials with the existing CMOS platform is a promising solution to enhance the performance and functionalities of the future CMOS based integrated cir... » read more

Protecting Power Management Circuits Against Trojan Attacks


A technical paper titled “Hardware Trojans in Power Conversion Circuits” was published by researchers at UC Davis. Abstract: "This report investigates the potential impact of a Trojan attack on power conversion circuits, specifically a switching signal attack designed to trigger a locking of the pulse width modulation (PWM) signal that goes to a power field-effect transistor (FET). The fi... » read more

Using The Schottky Barrier Transistor in Various Applications & Material Systems


A new technical review paper titled "The Schottky barrier transistor in emerging electronic devices" was published by researchers at THM University of Applied Sciences, Chalmers University of Technology, CNRS, University Grenoble Alpes and others. Abstract "This paper explores how the Schottky barrier (SB) transistor is used in a variety of applications and material systems. A discussion of... » read more

Control of the Schottky barrier height in monolayer WS2 FETs using molecular doping (NIST)


A new research paper titled "Control of the Schottky barrier height in monolayer WS2 FETs using molecular doping" was published by researchers at NIST, Theiss Research, Naval Research Laboratory, and Nova Research. Abstract: "The development of processes to controllably dope two-dimensional semiconductors is critical to achieving next generation electronic and optoelectronic devices. Unde... » read more

Fully CMOS-compatible Ternary Inverter with a Memory Function Using Silicon Feedback Field-Effect Transistors (FBFETs)


New technical paper titled "New ternary inverter with memory function using silicon feedback field-effect transistors" was published from researchers at Korea University. Abstract: In this study, we present a fully complementary metal–oxide–semiconductor-compatible ternary inverter with a memory function using silicon feedback field-effect transistors (FBFETs). FBFETs operate with a pos... » read more

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