tag: formal verification

ISO 26262 Statistics
By Ed Sperling - 02 Jul, 2018 - Comments: 0

Jorg Gosse, functional safety product manager at OneSpin Solutions, talks about the statistics behind the standards, what is considered good enough, and how those numbers vary across different standards. https://youtu.be/cNTFN3kQ-OM » read more

Formal Abstraction And Coverage
By Brian Bailey - 28 Jun, 2018 - Comments: 0

For the past three years, Oski Technology has facilitated a gathering of formal verification experts over dinner to discuss the problems and issues that they face. They discuss techniques they have been attempting with formal verification technologies, along with the results they have been achieving. Semiconductor Engineering was there to record that conversation and to condense it into the ... » read more

FPGAs Becoming More SoC-Like
By Ann Mutschler - 04 Jun, 2018 - Comments: 1

FPGAs are blinged-out rockstars compared to their former selves. No longer just a collection of look-up tables (LUTs) and registers, FPGAs have moved well beyond into now being architectures for system exploration and vehicles for proving a design architecture for future ASICs. This family of devices now includes everything from basic programmable logic all the way up to complex SoC devices.... » read more

Get Ready For Verification 3.0
By Brian Bailey - 24 May, 2018 - Comments: 0

Jim Hogan, managing partner of Vista Ventures, LLC, is perhaps the best-known investor in the EDA space. Recently, he has been focusing time and attention on verification startups, including cloud technology company Metrics, and Portable Stimulus pioneer Breker Verification Systems. This adds to his longer-term commitment to formal verification with OneSpin Solutions. These companies are part ... » read more

Tech Talk: Traceability In Functional Safety
By Ed Sperling - 24 May, 2018 - Comments: 0

Dominik Strasser, vice president of engineering at OneSpin Solutions, talks about the impact of functional safety regulations on liability and traceability in automotive, rail, industrial, nuclear and machinery applications. https://youtu.be/2jWnId8jQJg » read more

Finding And Fixing ML’s Flaws
By Ed Sperling - 02 May, 2018 - Comments: 0

OneSpin CEO Raik Brinkmann sat down with Semiconductor Engineering to discuss how to make machine learning more robust, predictable and consistent, and new ways to identify and fix problems that may crop up as these systems are deployed. What follows are excerpts of that conversation. SE: How do we make sure devices developed with machine learning behave as they're supposed to, and how do we... » read more

Tech Talk: FPGA RTL Checking
By Ed Sperling - 26 Apr, 2018 - Comments: 3

Tobias Welp, software architect and engineering manager at OneSpin Solutions, explains how to ensure the RTL created by design engineers matches what shows up in an FPGA. https://youtu.be/0N1PDYyq0dY » read more

EDA In The Cloud
By Brian Bailey - 26 Apr, 2018 - Comments: 4

Semiconductor Engineering sat down to discuss the migration of EDA tools into the Cloud with Arvind Vel, director of product management at ANSYS; Michal Siwinski, vice president of product management at Cadence; Richard Paw, product marketing manager at DellEMC, Gordon Allan, product manager at Mentor, a Siemens Business; Doug Letcher, president and CEO of Metrics, Tom Anderson, technical marke... » read more

Going Deep Or Broad With Formal?
By Ann Mutschler - 28 Mar, 2018 - Comments: 0

Whether to apply [getkc id="33" comment="formal verification"] technology to semiconductor design broadly or deeply is a tough question. It hinges on what is the best way to achieve maximum ROI. Do you want to identify hard to find bugs, and get a certain level of confidence about a block? Where should the effort be placed? Is it by going deep, meaning a team of specialists or experts must b... » read more

Can Big Data Help Coverage Closure?
By Brian Bailey - 22 Mar, 2018 - Comments: 0

Semiconductor designs are a combination of very large numbers and very small numbers. There is a large numbers of transistors at very small sizes, and databases are often large. The chip industry has been looking at [getkc id="305" kc_name="machine learning"] to effectively manage some of this data, but so far datasets have not been properly tagged across the industry and there is a reluctan... » read more

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