tag: Fraunhofer EAS

Optimization Challenges For Safety And Security
By Brian Bailey - 11 Apr, 2019 - Comments: 0

Complexity challenges long-held assumptions. In the past, the semiconductor industry thought it understood performance/area tradeoffs, but over time it became clear this is not so simple. Measuring performance is no longer an absolute. Power has many dimensions including peak, average, total energy and heat, and power and function are tied together. Design teams are now dealing with the impl... » read more

Toward Consistent Circuit-Level Aging Simulations In Different EDA Environments
By Fraunhofer IIS/EAS - 10 Apr, 2019 - Comments: 0

Aging simulations on circuit level allow integrated circuit (IC) designers to verify their circuits with respect to lifetime reliability requirements by considering the degradation of field effect transistors (FETs). To obtain significant analysis results with a reasonable effort, two prerequisites have to be fulfilled. First, reasonable models for FET degradation effects have to be set up. Sec... » read more

Why Analog Designs Fail
By Brian Bailey - 14 Feb, 2019 - Comments: 2

The gap between analog and digital reliability is growing, and digital designs appear to be winning. Reports show that analog content causes the most test failures and contributes significantly more than digital to field returns. The causes aren't always obvious, though. Some of it is due to the maturity of analog design and verification. While great strides have been made in digital circuit... » read more

Pushing AI Into The Mainstream
By Brian Bailey - 31 Jan, 2019 - Comments: 0

Artificial intelligence is emerging as the driving force behind many advancements in technology, even though the industry has merely scratched the surface of what may be possible. But how deeply AI penetrates different market segments and technologies, and how quickly it pushes into the mainstream, depend on a variety of issues that still must be resolved. In addition to a plethora of techni... » read more

Process Variation And Aging
By Ann Mutschler - 17 Jan, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss design reliability and circuit aging with João Geada, chief technologist for the semiconductor business unit at ANSYS; Hany Elhak, product management director, simulation and characterization in the custom IC and PCB group at Cadence; Christoph Sohrmann, advanced physical verification at Fraunhofer EAS; and Naseer Khan, vice president of sales at M... » read more

AI Market Ramps Everywhere
By Brian Bailey - 20 Dec, 2018 - Comments: 0

Artificial Intelligence (AI) has inspired the general populace, but its rapid rise over the past few years has given many people pause. From realistic concerns about robots taking over jobs to sci-fi scares about robots more intelligent than humans building ever smarter robots themselves, AI inspires plenty of angst. Within the technology industry, we have a better understanding about the pote... » read more

Designing For Ultra-Low-Power IoT Devices
By Ann Mutschler - 19 Dec, 2018 - Comments: 1

Optimizing designs for power is becoming the top design challenge in battery-driven IoT devices, boxed in by a combination of requirements such as low cost, minimum performance and functionality, as well as the need for at least some of the circuits to be always on. Power optimization is growing even more complicated as AI inferencing moves from the data center to the edge. Even simple sens... » read more

The Cost Of Accuracy
By Brian Bailey - 13 Dec, 2018 - Comments: 0

How accurate does a system need to be, and what are you willing to pay for that accuracy? There are many sources of inaccuracy throughout the development flow of electronic systems, most of which involve complex tradeoffs. Inaccuracy leaves an impact on your design in ways you are not even aware of, hidden by best practices or guard-banding. EDA tools also inject some inaccuracy. As the i... » read more

Ultra-Low-Power SAR ADC in 22 nm FD-SOI Technology Using Body-Biasing
By Fraunhofer IIS/EAS - 12 Dec, 2018 - Comments: 0

Today’s sensor applications show a rising demand on miniaturized autonomous sensors nodes with extreme requirements on power dissipation. One core functionality of these sensor nodes is the conversion of analog sensor signals to digital data for post processing and data communication. In this work a 11-bit Successive Approximation Register (SAR) ADC with minimized power dissipation is develop... » read more

How To Improve Analog Design Reuse
By Ann Mutschler - 14 Nov, 2018 - Comments: 0

Digital circuit design is largely automated today, but most analog components still are designed manually. This may change soon. As analog design grows increasingly complex and error-prone, design teams and tool vendors are focusing on how to automate as much of the design of analog circuits as possible. Analog design is notoriously difficult and varied. It can include anything from power ma... » read more

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