tag: Fraunhofer IIS

Steep Spike For Chip Complexity And Unknowns
By Ed Sperling - 05 May, 2021 - Comments: 0

Cramming more and different kinds of processors and memories onto a die or into a package is causing the number of unknowns and the complexity of those designs to skyrocket. There are good reasons for combining all of these different devices into an SoC or advanced package. They increase functionality and can offer big improvements in performance and power that are no longer available just b... » read more

Car Industry Changing Under The Hood
By Ann Mutschler - 07 Jan, 2021 - Comments: 0

After an initial burst of autonomous activity, the automotive ecosystem regrouped, re-evaluated its goals, and is now ready to begin deploying new technologies made possible by modern development approaches and forward-looking vehicle architectures. The pandemic hurt vehicle sales in 2020, but it also gave the OEMs a chance to catch their breath. Panic over announcements from other carmakers... » read more

Week In Review: Design, Low Power
By Jesse Allen - 06 Nov, 2020 - Comments: 0

Tools Mentor unveiled Tessent Streaming Scan Network software for its Tessent TestKompress software. The new solution includes embedded infrastructure and automation that decouples core-level DFT requirements from the chip-level test delivery resources for a simplified bottom-up DFT flow. The bus-based scan data distribution architecture enables simultaneous testing of any number of cores and ... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 06 Nov, 2020 - Comments: 0

Automotive Bosch licensed Arteris IP’s FlexNoC interconnect products for Bosch’s automotive chips. “Arteris IP provides the easiest and fastest means to assemble the complex chips we require while allowing us to implement innovative functional safety mechanisms within our designs,” said Oliver Wolst, senior vice president integrated circuits at Bosch. Mentor, a Siemens business, int... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 23 Oct, 2020 - Comments: 0

Automotive, automation General Motors is planning a third electric-vehicle plant. The former Saturn factory will make first fully electric Cadillac, in the former Saturn assembly line. Tesla is allowing some customers to beta test its Full Self-Driving (FSD), according to The Verge. The company pushed the software update to some early access customers to do some real world beta test. Some o... » read more

Week In Review: Design, Low Power
By Jesse Allen - 31 Jul, 2020 - Comments: 0

Analog Devices (ADI) acquired the HDMI business of Invecas. “The acquisition of Invecas' HDMI business positions ADI to deliver more complete solutions throughout the entire customer journey – from chip, to certification, to end product," said John Hassett, Senior Vice President, Industrial and Consumer at Analog Devices. "We are thrilled to enhance ADI’s capabilities with the addition of... » read more

Week In Review: Design, Low Power
By Jesse Allen - 10 Jan, 2020 - Comments: 0

Synopsys will acquire certain IP assets of INVECAS. The acquisition expands Synopsys' DesignWare Logic Library, General Purpose I/O, Embedded Memory, Interface and Analog IP portfolio. The acquisition will also add a team of experienced R&D engineers to focus on physical IP across a range of process technologies. INVECAS will retain its HDMI IP and ASIC Design Solutions businesses. The deal... » read more

Week In Review: IoT, Security, Autos
By Susan Rambo - 10 Jan, 2020 - Comments: 0

Internet of Things Sensors that see in the dark, look deep into our faces and hear the impossible, were all part of ams’ CES lineup this week. ams announced that it has designed an advanced spectral ambient light sensor (ALS) for high-end mobile phone cameras. The ALS, called the AS7350, identifies the light source and makes an accurate white balance under low-light and other non-ideal condi... » read more

Low-Latency Image Acquisition And Processing With A Programmable Vision-System-On-Chip
By Fraunhofer IIS/EAS - 12 Sep, 2018 - Comments: 0

This work aims to demonstrate the benefits of using a Vision-System-on-Chip for image processing tasks with very high latency demands between image acquisition and processing. By leveraging a column-parallel, mixed-signal data path, which is entirely software-defined by three application-specific instruction- set processors (ASIPs), image data within multiple regions of interest can be analyzed... » read more

Chip Aging Becomes Design Problem
By Brian Bailey - 09 Aug, 2018 - Comments: 9

Chip aging is a growing problem at advanced nodes, but so far most design teams have not had to deal with it. That will change significantly as new reliability requirements roll out across markets such as automotive, which require a complete analysis of factors that affect aging. Understanding the underlying physics is critical, because it can lead to unexpected results and vulnerabilities. ... » read more

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