Power And Performance: GSS Sees SOI Advantages For FinFETs

By Various Writers - 17 Sep, 2012 - Comments: 0

Are FinFETs better on SOI? In a series of papers, high-profile blogs and subsequent media coverage,Gold Standard Simulations (aka GSS) has indicated that, yes, FinFETs should indeed be better on SOI. To those of us not deeply involved in the research world, much of this may seem to come out of nowhere. But there’s a lot of history here, and in this blog we’ll take a look at what it’s... » read more

Being Different Is Bad

By Ed Sperling - 23 Aug, 2012 - Comments: 0

By Ann Steffora Mutschler Today’s SoCs contain as much as 80% existing IP that either has been re-used from previous projects or obtained from a third party. Models are created of this hardware IP, as well as new portions of the design, in order to create a virtual prototype that allows the engineering team to see the complete system by running software and applications. While this a... » read more

The Trouble With Models

By Ed Sperling - 28 Jun, 2012 - Comments: 0

By Ann Steffora Mutschler Models and modeling concepts seem to be on the tip of every tongue these days. Once the promise of sparking true ESL design, the use of system-level models has settled into something more like enabling software development. There is also talk of leveraging models across the supply chain, but is this really possible yet? The concept of doing this incremental refinem... » read more

Merger In Progress

By Jon McDonald - 28 Jun, 2012 - Comments: 0

By Jon McDonald June's been an interesting month, I was at the Design Automation Conference, DAC, in San Francisco, then a week later, the Freescale Technology Forum, FTF. DAC is generally more of a hardware design conference, while FTF generally is a bit more focused on software and systems. This year I was surprised at the similarities in some of the discussions at both shows. At DAC ther... » read more

IP Tagging Resurfaces

By Ed Sperling - 30 Jun, 2011 - Comments: 0

By Ed Sperling System-Level Design sat down with Kathy Werner, IP strategy and business manager inside of Freescale’s Design Technology Organization, to discuss tagging of soft IP. What follows are excerpts of that conversation. SLD: How new is the concept of IP tagging? Werner: IP tagging has been around for a long time. VSI Alliance was one of the first standards organizations that l... » read more

SoC Design In 5 Years

By Ed Sperling - 30 Jun, 2011 - Comments: 0

By Ed Sperling The semiconductor industry is used to looking at changes every couple of years, based upon the progression of Moore’s Law. But look out further, over the next five years when the most advanced process node is somewhere between 14nm and 16nm, and the job of designing and manufacturing an SoC will look very different. At the center of this change are three very significant tr... » read more

Mobile Applications Drive New Architectures

By Ed Sperling - 28 Apr, 2011 - Comments: 0

By Pallab Chatterjee The push toward mobility in consumer devices is having an impact on the entire component flow. Mobile devices are dominated by two key factors—an overriding power constraint and very high data bandwidth. The power constraints are on the mobile device side and on the cloud-based support server side. The high data bandwidth issues are due to the limited processing powe... » read more

MEMS on SOI – Growing Fast and Faster

By Various Writers - 11 Apr, 2011 - Comments: 0

By Adele Hars In the latest ASN posting by Dr. Eric Mounier of Yole Developpement, “SOI for MEMS: A Promising Material”, he notes that SOI MEMS is growing at a CAGR (2011-2015) of 15.6%, compared to 8.1% for bulk silicon-based solutions. MEMS designers are doing amazing things on SOI – which would explain that impressive growth rate. [caption id="attachment_12" align="aligncenter... » read more

The Enterprise Effect

By Ed Sperling - 24 Feb, 2011 - Comments: 0

By Pallab Chatterjee In the enterprise it’s all about speed and power—as in more speed and less power—and those changes are forcing shifts in the chip architectures as well as the processes used to develop those chips. At the Linley Data Center Conference the next generation of network control chips were discussed. The keys for the new networks are 10G data lanes to be used with 10G/4... » read more

What’s A Cell Phone?

By Ed Sperling - 27 Jan, 2011 - Comments: 0

By Ed Sperling Just because a smart phone is sold by Verizon or AT&T mobile no longer means that it will be used primarily as a phone. That distinction may sound trivial, but it has deep implications for the components that are used inside of these devices, how they’re used, and who wins the designs. Shifts such as this can also lead to broad changes in who buys the tools to develop t... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

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Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

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AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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