More Than Random: Achieving Systematic ASIL D ISO 26262 Compliance For Automotive SoCs

By Ron DiGiuseppe - 04 Aug, 2022 - Comments: 0

Automakers are upgrading vehicle autonomy levels from Level2 Advanced Driving Assistance Systems (ADAS) to Level 2+ and Level 3 and evolving to full Highly Automated Driving (HAD) Level 4 and Level 5 with new safety critical applications. The new applications such as automatic emergency braking, lane keep aid, traffic sign recognition, surround view, drowsiness monitoring, and others improve sa... » read more

Shifting The Burden Of Tool Safety Compliance From Users To Vendors

By OneSpin Solutions - 05 Aug, 2020 - Comments: 0

Functional safety standards demand that this risk be assessed and adequately minimized through tool qualification and other processes. For engineering teams, this is a time-consuming task and, worryingly, one for which there are no mature solutions yet. Tool vendors may provide safety certificates or packages, in an attempt to support their customers with safety compliance. Strategies... » read more

Functional Safety Implementation Goes Mainstream

By Mary Ann White - 24 Oct, 2019 - Comments: 0

Electronics engineers are being thrust into the automotive market like never before. The move to electrify automobiles, along with the advent of self-driving cars, means that silicon designers will be designing ever more sophisticated automotive ICs. But cars aren’t like most other electronic systems; it’s imperative that they cause no harm should they fail. This brings us to the realm o... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

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Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

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3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

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AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

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Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

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The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

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Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

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Megafabs churning out the most advanced processors are not the only game in town.

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More Than Random: Achieving Systematic ASIL D ISO 26262 Compliance For Automotive SoCs

Shifting The Burden Of Tool Safety Compliance From Users To Vendors

Functional Safety Implementation Goes Mainstream