Week In Review: Manufacturing, Test

By Linda Christensen - 06 May, 2022 - Comments: 0

Acquisitions & Investments California-based MaxLinear plans to acquire Taiwan-based Silicon Motion (SMI), in a cash and stock deal valued at about $3.8 billion. Silicon Motion’s NAND flash controller technology for solid state storage devices, will extend MaxLinear’s RF, analog, and mixed signal portfolio. ISMC will invest about $3 billion in a semiconductor plant in India’s south... » read more

Technical Paper Round-up: May 3

By Linda Christensen - 03 May, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=24 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

Vertically stacked, low-voltage organic ternary logic circuits including nonvolatile floating-gate memory transistors

By Technical Paper Link - 02 May, 2022 - Comments: 0

Research paper from KAIST and Gachon University. Abstract "Multi-valued logic (MVL) circuits based on heterojunction transistor (HTR) have emerged as an effective strategy for high-density information processing without increasing the circuit complexity. Herein, an organic ternary logic inverter (T-inverter) is demonstrated, where a nonvolatile floating-gate flash memory is employed to ... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Gachon University

Week In Review: Manufacturing, Test

Technical Paper Round-up: May 3

Vertically stacked, low-voltage organic ternary logic circuits including nonvolatile floating-gate memory transistors