Chip Industry Week in Review

By The SE Staff - 03 Jul, 2025 - Comments: 0

[Editor's Note: Early edition due to the U.S. July 4th holiday.] The U.S. government lifted export restrictions that barred Synopsys, Siemens EDA, and Cadence from selling EDA tools to China. In a statement, Synopsys said it received a letter from the U.S. Commerce Department immediately rescinding those restrictions. Siemens issued a similar statement. Which tools or hardware accelerated t... » read more

Stacking Persistent Embedded Memories Based On Oxide Transistors Upon GPGPU Platforms (Georgia Tech)

By Technical Paper Link - 01 Jul, 2025 - Comments: 0

A new technical paper titled "CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms" was published by Georgia Tech. Abstract "In contemporary general-purpose graphics processing units (GPGPUs), the continued increase in raw arithmetic throughput is constrained by the capabilities of the register file (single-cycle) and last-level cache (high bandwidth... » read more

Research Bits: July 1

By Jesse Allen - 01 Jul, 2025 - Comments: 0

Copper-to-copper bonding for GaN integration Researchers from MIT, Georgia Tech, and Air Force Research Laboratory propose a bonding process to integrate gallium nitride (GaN) transistors onto standard silicon CMOS chips. They used the process to create a power amplifier. “We wanted to combine the functionality of GaN with the power of digital chips made of silicon, but without having to ... » read more

Novel Assembly Approaches For 3D Device Stacks

By Laura Peters - 30 Jun, 2025 - Comments: 0

The next big leap in semiconductor packaging will require a slew of new technologies, processes, and materials, but collectively they will enable orders of magnitude improvement in performance that will be essential for the AI age. Not all of these issues are fully solved but the recent Electronic Components Technology Conference (ECTC) provided a glimpse into the huge leaps in progress that... » read more

Chip Industry Technical Paper Roundup: May 13

By Linda Christensen - 13 May, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=430 /] Find more semiconductor research papers here. » read more

Comparisons of HW Versus SW Implementation of Warp Level Features in Vortex RISC-V GPU (Georgia Tech, IIT)

By Technical Paper Link - 11 May, 2025 - Comments: 0

A new technical paper titled "Hardware vs. Software Implementation of Warp-Level Features in Vortex RISC-V GPU" was published by researchers at Georgia Tech and Indian Institute of Technology Bombay. Abstract "RISC-V GPUs present a promising path for supporting GPU applications. Traditionally, GPUs achieve high efficiency through the SPMD (Single Program Multiple Data) programming model. Ho... » read more

Chip Industry Technical Paper Roundup: May 6

By Linda Christensen - 06 May, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=427 /] Find more semiconductor research papers here. » read more

Optimizing End-to-End Communication And Workload Partitioning In MCM Accelerators (Georgia Tech)

By Technical Paper Link - 03 May, 2025 - Comments: 0

A new technical paper titled "MCMComm: Hardware-Software Co-Optimization for End-to-End Communication in Multi-Chip-Modules" was published by researchers at Georgia Tech. Abstract "Increasing AI computing demands and slowing transistor scaling have led to the advent of Multi-Chip-Module (MCMs) based accelerators. MCMs enable cost-effective scalability, higher yield, and modular reuse by par... » read more

Chip Industry Week in Review

By The SE Staff - 25 Apr, 2025 - Comments: 0

To listen to the podcast version, click here. TSMC unveiled an unusually detailed roadmap at this week's North America Technology Symposium, including future architectures for 3D-ICs for high-performance computing and small, extremely low-power chips for AR/VR glasses, and two implementations of system-on-wafer. Fig. 1: TSMC's future packaging and stacking roadmap. Source: TSMC The ... » read more

Chip Industry Week In Review

By The SE Staff - 18 Apr, 2025 - Comments: 0

[Podcast version is here.] TSMC said it will produce 30% of its leading-edge chips in Arizona when all six of its fabs are operational, a total investment of $165 billion, Axios reported. In its latest SEC filing, the foundry said it continues to add capacity in Taiwan, Arizona, Japan, and Germany. The Trump administration launched a Section 232 investigation into semiconductors and relat... » read more

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