Chip Industry Technical Paper Roundup: Mar. 31


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations DiscoRD: An Experimental Methodology for Quickly Discovering the Reliable Read Disturbance Threshold of Real DRAM Chips 🔗 ETH Zurich, Rutgers University Performance Analysis of Edge and In-Sensor AI Processors: A Comparative Review 🔗 Univ... » read more

Systematic Analysis of CPU-Induced Slowdowns in Multi-GPU LLM Inference (Georgia Tech)


A new technical paper, "Characterizing CPU-Induced Slowdowns in Multi-GPU LLM Inference," was published by the Georgia Institute of Technology. Abstract "Large-scale machine learning workloads increasingly rely on multi-GPU systems, yet their performance is often limited by an overlooked component: the CPU. Through a detailed study of modern large language model (LLM) inference and servin... » read more

Chip Industry Technical Paper Roundup: Mar. 24


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations NL2GDS: LLM-aided interface for Open Source Chip Design 🔗 University of Bristol, Rutherford Appleton Laboratory An Integrated Failure and Threat Mode and Effect Analysis (FTMEA) Framework with Quantified Cross-Domain Correlation Factors for Automot... » read more

How SW and HW Vulnerabilities Can Complement LLM-Specific Algorithmic Attacks (UT Austin, Intel et al.)


A new technical paper, "Cascade: Composing Software-Hardware Attack Gadgets for Adversarial Threat Amplification in Compound AI Systems," was published by the University of Texas, Austin, Intel Labs, Symmetry Systems, Microsoft and Georgia Tech. Abstract "Rapid progress in generative AI has given rise to Compound AI systems - pipelines comprised of multiple large language models (LLM), so... » read more

3D DRAM with CBA Technology (Georgia Tech)


A new technical paper, "System-Technology Co-Optimization of Bitline Routing and Bonding Pathways in Monolithic 3D DRAM Architectures," was published by researchers at Georgia Tech. Abstract "3D DRAM has emerged as a promising approach for continued density scaling, but its viability is limited by routing and hybrid bonding constraints to periphery, which may degrade sensing margin, laten... » read more

FeFETs With Laminated Gate Stacks For Radiation Resilience in Vertical NAND (Georgia Tech)


A new technical paper, "Enabling Radiation Hardness in Solid-State NAND Storage Utilizing a Laminated Ferroelectric Stack," was published by researchers at Georgia Tech. Abstract "NAND flash forms the core of modern solid-state storage, which is critical for data-intensive AI applications, yet charge-trap NAND suffers rapid threshold-voltage (Vth) degradation under ionizing radiation, causi... » read more

Chip Industry Week In Review


Big Deals and Fundings Rapidus secured US$1.7B in a new funding round from the Japanese government and the private sector to ramp 2nm production by next year. Open AI announced a $110B in new funding, with $30B from Nvidia, $30B from Softbank and $50B from Amazon. In a $100B multi-year deal, Meta will power its AI infrastructure with up to 6GW of AMD's GPUs. SambaNova and Intel ar... » read more

Chip Industry Week in Review


The IEEE ISSCC conference was held this week in San Francisco. Among the highlights: IBM detailed an AI accelerator based on its new inferencing dataflow architecture. CEA-Leti presented a chip-scale, ultra-fast, battery-operated EPR spectrometer. QuTech introduced a cryo-CMOS SoC with NV centers in diamond. UTokyo showed its low-jitter PLL architecture for beyond 5G/6G. Imec d... » read more

Chip Industry Week In Review


Geopolitics U.S. lawmakers are urging tighter export controls on advanced semiconductor manufacturing equipment (SME) to China, warning existing loopholes threaten national security. "China is working to build domestic SME by exploiting access to U.S. and allied subcomponents required to produce tools," states the letter, which also says better coordination with allies is essential. The U.S.... » read more

Annual Global IC Fabs And Facilities Report


Semiconductor companies announced a significant number of facilities in 2025 as global onshoring efforts continued across manufacturing, materials, packaging, design, and R&D. Investments came from both industry and government sources. Organizations worked together to solve current technology challenges, including soaring demand for AI chips and advanced memory, as well as complex applic... » read more

← Older posts Newer posts →