Interconnect Challenges Rising


Chipmakers are ramping up their 14nm finFET processes, with 10nm and 7nm slated to ship possibly later this year or next. At 10nm and beyond, IC vendors are determined to scale the two main parts of the [getkc id="185" kc_name="finFET"] structure—the transistor and interconnects. Generally, transistor scaling will remain challenging at advanced nodes. And on top of that, the interconnects ... » read more

How To Build Systems In Package


The semiconductor industry is racing to define a series of road maps for semiconductors to succeed the one created by the ITRS, which will no longer be updated, including a brand new one focused on heterogeneous integration. The latest entry will establish technology targets for integration of heterogeneous multi-die devices and systems. It has the support of IEEE's Components, Packaging and... » read more

System Bits: May 24


Controlling autonomous vehicles in extreme conditions In an approach that could help make self-driving cars of the future safer under hazardous road conditions, a Georgia Institute of Technology research team devised a way to help keep a driverless vehicle under control as it maneuvers at the edge of its handling limits. According to the team comprised of researchers from Georgia Tech’s D... » read more

Rethinking Processor Architectures


The semiconductor industry's obsession with clock speeds, cores and how many transistors fit on a piece of silicon may be nearing an end for real this time. The [getentity id="22048" comment="IEEE"] said it will develop the International Roadmap for Devices and Systems (IRDS), effectively setting the industry agenda for future silicon benchmarking and adding metrics that are relevant to specifi... » read more

Power/Performance Bits: March 8


Configurable analog chip Researchers at Georgia Tech built a new configurable computing device, the Field-Programmable Analog Array (FPAA) SoC, that uses analog technology supported by digital components and can be built up to a hundred times smaller while using a thousand times less electrical power than comparable digital floating-gate configurable devices. Professionals familiar with F... » read more

Inside The SRC


Semiconductor Engineering sat down to talk with Ken Hansen, the new president and chief executive of the Semiconductor Research Corp. (SRC), a U.S.-based technology research consortium. Prior to joining the SRC in May, Hansen was vice president and chief technology officer at Freescale. What follows are excerpts of that conversation. SE: My impression is that the SRC allocates funding for va... » read more

System Bits: Oct. 6


Tiny graphene pores for sensors In fundamental work that will likely guide current and future graphene membrane design principles in years to come, MIT researchers have created tiny pores in single sheets of graphene that have an array of preferences and characteristics similar to those of ion channels in living cells, and which could be useful as sensors. The researchers pointed out that e... » read more

Manufacturing Bits: Sept. 29


Turning the nano-wrench The University of Vermont has developed a wrench that has linewidth geometries at 1.7nm. The so-called nano-wrench is an atomic-level tool, which could one day be used to create tiny structures and molecules. The nano-wrench has been devised using a technology called chirality-assisted synthesis (CAS). Chirality is derived from the Greek word for hand. If one holds u... » read more

Power/Performance Bits: Sept. 29


Optical rectenna Engineers at the Georgia Institute of Technology demonstrated the first optical rectenna, a device that combines the functions of an antenna and a rectifier diode to convert light directly into DC current. Based on multiwall carbon nanotubes and tiny rectifiers fabricated onto them, the optical rectennas could provide a new technology for photodetectors that would operate... » read more

Interconnect Challenges Grow


It’s becoming apparent that traditional chip scaling is slowing down. The 16nm/14nm logic node took longer than expected to unfold. And the 10nm node and beyond could suffer the same fate. So what’s the main cause? It’s hard to pinpoint the problem, although many blame the issues on lithography. But what could eventually hold up the scaling train, and undo Moore’s Law, is arguably t... » read more

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