Chip Industry Technical Paper Roundup: Oct. 8


New technical papers recently added to Semiconductor Engineering’s library: [table id=365 /] More ReadingTechnical Paper Library home » read more

Rowhammer Protection By Addressing Root Cause (Georgia Tech)


A new technical paper titled "Preventing Rowhammer Exploits via Low-Cost Domain-Aware Memory Allocation" was published by researchers at Georgia Tech. Abstract "Rowhammer is a hardware security vulnerability at the heart of every system with modern DRAM-based memory. Despite its discovery a decade ago, comprehensive defenses remain elusive, while the probability of successful attacks grows ... » read more

Review Paper: Challenges Required To Bring the Energy Consumption Down in Microelectronics (Rice, UC Berkeley, Georgia Tech, Et al.)


A new review article titled "Roadmap on low-power electronics" by researchers at Rice University, UC Berkeley, Georgia Tech, TSMC, Intel, Harvard, et al. This roadmap to energy efficient electronics written by numerous collaborators covers materials, modeling, architectures, manufacturing, metrology and more. Find the technical paper here. September 2024. Ramamoorthy Ramesh, Sayeef Sal... » read more

Chip Industry Technical Paper Roundup: Oct. 1


New technical papers recently added to Semiconductor Engineering’s library: [table id=360 /] More ReadingTechnical Paper Library home » read more

Hardware Acceleration Approach for KAN Via Algorithm-Hardware Co-Design


A new technical paper titled "Hardware Acceleration of Kolmogorov-Arnold Network (KAN) for Lightweight Edge Inference" was published by researchers at Georgia Tech, TSMC and National Tsing Hua University. Abstract "Recently, a novel model named Kolmogorov-Arnold Networks (KAN) has been proposed with the potential to achieve the functionality of traditional deep neural networks (DNNs) using ... » read more

Chip Industry Technical Paper Roundup: Sept. 24


New technical papers recently added to Semiconductor Engineering’s library: [table id=358 /] More ReadingTechnical Paper Library home » read more

Characteristics and Potential HW Architectures for Neuro-Symbolic AI


A new technical paper titled "Towards Efficient Neuro-Symbolic AI: From Workload Characterization to Hardware Architecture" was published by researchers at Georgia Tech, UC Berkeley, and IBM Research. Abstract: "The remarkable advancements in artificial intelligence (AI), primarily driven by deep neural networks, are facing challenges surrounding unsustainable computational trajectories, li... » read more

Chip Industry Week In Review


Synopsys agreed to sell its Optical Solutions Group to Keysight for an undisclosed amount, in a deal deemed necessary for Synopsys to win regulatory approval for its planned acquisition of Ansys. The sale to Keysight is contingent on the Synopsys-Ansys deal going through. Meanwhile, Ansys has its own optical business. The U.S. Department of Defense (DoD) made the first awards for Microelectr... » read more

Edge Devices Require New Security Approaches


The diversity of connected devices and chips at the edge — the vaguely defined middle ground between the end point and the cloud — is significantly widening the potential attack surface and creating more opportunities for cyberattacks. The edge build-out has been underway for at least the past half-decade, largely driven by an explosion in data and increasing demands to process that data... » read more

Security Technical Paper Roundup: Aug. 27


A number of hardware security-related technical papers were presented at the August 2024 USENIX Security Symposium. The organization provides open access research, and the presentation slides and papers are free to the public. Topics include side-channel attacks and defenses, embedded security, fuzzing, fault injection, logic locking, Rowhammer, and more. Here are some highlights with associate... » read more

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