Memory-Based Cyberattacks Become More Complex, Difficult To Detect


Memories are becoming entry points for cyber attacks, raising concerns about system-level security because memories are nearly ubiquitous in electronics and breaches are difficult to detect. There is no end in sight with hackers taking aim at almost every consumer, industrial, and commercial segment, and a growing number of those devices connected to the internet and to each other. According... » read more

Glitched On Earth By Humans


The Black Hat conference always brings up interesting and current research within the device security industry. Lennert Wouters of COSIC studied the security of the Starlink User Terminal. After some PCB-level reverse engineering, he found a serial port and observed various boot loaders, U-boot, and Linux running on the device. However, there was no obvious way to gain further access. The... » read more

Side-Channel Secure Translation Lookaside Buffer Architecture


A new technical paper titled "Risky Translations: Securing TLBs against Timing Side Channels" was posted by researchers at Ruhr University Bochum (Germany) and Cyber-Physical Systems of the German Research Center for Artificial Intelligence (DFKI). Abstract: "Microarchitectural side-channel vulnerabilities in modern processors are known to be a powerful attack vector that can be utilized to... » read more

Hardware Trojan Inserted Inside A RISC-V Based Automotive Telematics Control Unit


A new technical paper titled "On the Feasibility of Remotely Triggered Automotive Hardware Trojans" was written by researchers at Georgia Tech. "In this paper, we discuss how Hardware Trojans can act as the physical access intermediates to allow the remote triggering of malicious payloads embedded in ECUs, through seemingly benign wireless communication. We demonstrate a proof of concept ECU... » read more

Locking-Based Design-For-Security Methodology To Prevent Piracy of RF transceiver ICs


A new technical paper titled "Anti-Piracy Design of RF Transceivers" was published by researchers at Sorbonne Universite (France). Abstract: "We present a locking-based design-for-security methodology to prevent piracy of RF transceiver integrated circuits. The solution is called SyncLock as it locks the synchronization of the transmitter with the receiver. If a key other than the secret ... » read more

Cybersecurity & FPGA Devices


A technical paper titled "A Survey on FPGA Cybersecurity Design Strategies" is presented by researchers at Université Laval, Canada. Abstract (partial): "This paper presents a critical literature review on the security aspects of field programmable gate array (FPGA) devices. FPGA devices present unique challenges to cybersecurity through their reconfigurable nature. This paper also pays sp... » read more

Using eFPGAs For Security


Andy Jaros, vice president at Flex Logix, talks about the use of eFPGAs to keep pace with security risks over longer chip lifetimes, how configurable RTL can help, and why systems companies are altering the playing field for FPGAs. » read more

Implementations of 2D Material-Based Devices For IoT Security


A new research paper titled "Application of 2D Materials in Hardware Security for Internet-of-Things: Progress and Perspective" was published by researchers at National University of Singapore and A*STAR. The paper explores the "implementation of hardware security using 2D materials, for example, true random number generators (TRNGs), physical unclonable functions (PUFs), camouflage, and ant... » read more

Hardware Implementation Of A Random Gumber Generator On A FPGA


A new research paper titled "FPGA Random Number Generator" was published by a researcher at Johns Hopkins University. According to the paper's abstract: "This paper offers a proof-of-concept for creating a verilog-based hardware design that utilizes random measurement and scrambling algorithms to generate 32-bit random synchronously with a single clock cycle on a field-programmable-gate-arr... » read more

New Processor Fuzzing Mechanism


Researchers from Boston University and University of Washington published a technical paper titled "ProcessorFuzz: Guiding Processor Fuzzing using Control and Status Registers." Abstract "As the complexity of modern processors has increased over the years, developing effective verification strategies to identify bugs prior to manufacturing has become critical. Undiscovered micro-architectur... » read more

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