tag: hardware security

Hardware-Supported Patching of Security Bugs in Hardware IP Blocks
By Technical Paper Link - 22 Apr, 2022 - Comments: 0

New research paper from Duke University, University of Calgary, NYU & Intel. Abstract: "To satisfy various design requirements and application needs, designers integrate multiple Intellectual Property blocks (IPs) to produce a system-on-chip (SoC). For improved survivability, designers should be able to patch the SoC to mitigate potential security issues arising from hardware IPs; for incre... » read more

Reusing Verification Assertions as Security Checkers for Hardware Trojan Detection
By Technical Paper Link - 19 Apr, 2022 - Comments: 0

Abstract "Globalization in the semiconductor industry enables fabless design houses to reduce their costs, save time, and make use of newer technologies. However, the offshoring of Integrated Circuit (IC) fabrication has negative sides, including threats such as Hardware Trojans (HTs) - a type of malicious logic that is not trivial to detect. One aspect of IC design that is not affected by g... » read more

Hardware Countermeasures Benchmarking against Fault Attacks
By Technical Paper Link - 18 Apr, 2022 - Comments: 0

Abstract "The development of differential fault analysis (DFA) techniques and mechanisms to inject faults into cryptographic circuits brings with it the need to use protection mechanisms that guarantee the expected level of security. The AES cipher, as a standard, has been the target of numerous DFA techniques, where its security has been compromised through different formulations and types of... » read more

Quantum Machine Learning: Security Threats & Lines Of Defense
By Technical Paper Link - 12 Apr, 2022 - Comments: 0

New research paper from Pennsylvania State University explores quantum machine learning (QML) and its use in hardware security. Find the technical paper here. April 2022. Satwik Kundu and Swaroop Ghosh. 2022. Security Aspects of Quantum Machine Learning: Opportunities, Threats and Defenses (Invited). In Proceedings of the Great Lakes Symposium on VLSI 2022 (GLSVLSI ’22), June 6–8,... » read more

A novel multimodal hand database for biometric authentication
By Technical Paper Link - 30 Mar, 2022 - Comments: 0

Abstract "Biometric authentication is one of the most exciting areas in the era of security. Biometric authentication ideally refers to the process of identifying or verifying the user through physiological and behavioral measurements using security processes. Multimodal biometrics are preferred over unimodal biometrics due to the defensive nature of multimodal biometrics. This research intr... » read more

Fuzz, Penetration, and AI Testing for SoC Security Verification: Challenges and Solutions
By Technical Paper Link - 28 Mar, 2022 - Comments: 0

Abstract "The ever-increasing usage and application of system-on-chips (SoCs) has resulted in the tremendous modernization of these architectures. For a modern SoC design, with the inclusion of numerous complex and heterogeneous intellectual properties (IPs),and its privacy-preserving declaration, there exists a wide variety of highly sensitive assets. These assets must be protected from any u... » read more

Digital Twin for Secure Semiconductor Lifecycle Management: Prospects and Applications
By Technical Paper Link - 08 Mar, 2022 - Comments: 0

Abstract:  "The expansive globalization of the semiconductor supply chain has introduced numerous untrusted entities into different stages of a device’s lifecycle, enabling them to compromise its security. To make matters worse, the increasing complexity in the design as well as aggressive time-to-market requirements of the newer generation of integrated circuits can lead either designers t... » read more

Advances in Logic Locking: Past, Present, and Prospects
By Technical Paper Link - 08 Mar, 2022 - Comments: 0

Abstract: "Logic locking is a design concealment mechanism for protecting the IPs integrated into modern System-on-Chip (SoC) architectures from a wide range of hardware security threats at the IC manufacturing supply chain. Logic locking primarily helps the designer to protect the IPs against reverse engineering, IP piracy, overproduction, and unauthorized activation. For more than a decade,... » read more

Rethinking Watermark: Providing Proof of IP Ownership in Modern SoCs
By Technical Paper Link - 08 Mar, 2022 - Comments: 0

Abstract "Intellectual property (IP) cores are essential to creating modern system-on-chips (SoCs). Protecting the IPs deployed in modern SoCs has become more difficult as the IP houses have been established across the globe over the past three decades. The threat posed by IP piracy and overuse has been a topic of research for the past decade or so and has led to creation of a field called wat... » read more

Verifying Side-Channel Security Pre-Silicon
By Bryon Moyer - 03 Mar, 2022 - Comments: 1

As security grows in importance, side-channel attacks pose a unique challenge because they rely on physical phenomena that aren’t always modeled for the design verification process. While everything can be hacked, the goal is to make it so difficult that an attacker concludes it isn't worth the effort. For side-channel attacks, the pre-silicon design is the best place to address any known ... » read more

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