Design For Security Now Essential For Chips, Systems


It's nearly impossible to create a completely secure chip or system, but much can be done to raise the level of confidence about that security. In the past, security was something of an afterthought, disconnected from the architecture and added late in the design cycle. But as chips are used increasingly in safety- and mission-critical systems, and as the value of data continues to rise, the... » read more

ML-Based Framework for Automatically Generating Hardware Trojan Benchmarks


A new technical paper titled "Automatic Hardware Trojan Insertion using Machine Learning" was published by researchers at University of Florida and Stanford University. Abstract (partial): "In this paper, we present MIMIC, a novel AI-guided framework for automatic Trojan insertion, which can create a large population of valid Trojans for a given design by mimicking the properties of a small... » read more

Formal Verification Methodology For Detecting Security-Critical Bugs in HW & in the HW/Firmware Interface of SoCs (Award Winner)


A new technical paper titled "A Formal Approach to Confidentiality Verification in SoCs at the Register Transfer Level" was this year's first place winner of Intel's Hardware Security Academic Award program.   The approach utilizes UPEC (Unique Program Execution Checking) to identify functional design bugs causing confidentiality violations, covering both the processor and its peripherals. ... » read more

Security Research: Technical Paper Round-Up


A number of hardware security-related technical papers were presented at recent conferences, including the August 2022 USENIX Security Symposium and IEEE’s International Symposium on Hardware Oriented Security and Trust (HOST). Topics include side-channel attacks and defenses (including on-chip mesh interconnect attacks), heterogeneous attacks on cache hierarchies, rowhammer attacks and mitig... » read more

Heterogenous Computing & Cache Attacks


Researchers at imec-COSIC, KU Leuven presented this paper titled "Double Trouble: Combined Heterogeneous Attacks on Non-Inclusive Cache Hierarchies" at the USENIX Security Symposium in Boston in August 2022. Note, this is a prepublication paper. Abstract: "As the performance of general-purpose processors faces diminishing improvements, computing systems are increasingly equipped with domai... » read more

Microarchitectural Side-Channel Attacks and Mitigations on the On-Chip Mesh Interconnect


This new technical paper titled "Don't Mesh Around: Side-Channel Attacks and Mitigations on Mesh Interconnects" was presented by researchers at University of Illinois at Urbana-Champaign, MIT, and Texas Advanced Computing Center at the USENIX Security Symposium in Boston in August 2022. Abstract: "This paper studies microarchitectural side-channel attacks and mitigations on the on-chip mes... » read more

Syscall Attacks on PKU-based Isolation Systems (Graz University of Technology)


This technical paper titled "Jenny: Securing Syscalls for PKU-based Memory Isolation Systems" was presented by researchers at Graz University of Technology (Austria) at the USENIX Security Symposium in Boston in August 2022. Abstract: "Effective syscall filtering is a key component for withstanding the numerous exploitation techniques and privilege escalation attacks we face today. For exam... » read more

Side-Channel Attack “Binoculars” Exploits Interactions Between HW Page Walk Operations & Other Memory Operations


New technical paper titled "Binoculars: Contention-Based Side-Channel Attacks Exploiting the Page Walker" was presented by researchers at University of Illinois Urbana-Champaign and Tel Aviv University at the USENIX Security Symposium in Boston in August 2022. Abstract: "Microarchitectural side channels are a pressing security threat. These channels are created when programs modulate hardw... » read more

Vehicle Security: Post-Quantum Security to the CAN Network


This new technical paper titled "PUF-Based Post-Quantum CAN-FD Framework for Vehicular Security" is published by researchers at University of Tennessee. Abstract "The Controller Area Network (CAN) is a bus protocol widely used in Electronic control Units (ECUs) to communicate between various subsystems in vehicles. Insecure CAN networks can allow attackers to control information between vit... » read more

Assessing & Simulating Semiconductor Side-Channel or Unintended Data Leakage Vulnerabilities


This research paper titled "Multiphysics Simulation of EM Side-Channels from Silicon Backside with ML-based Auto-POI Identification" from researchers at Ansys, National Taiwan University and Kobe University won the best paper award at IEEE's International Symposium on Hardware Oriented Security and Trust (HOST). The paper presents a new tool "to assess unintended data leakage vulnerabilities... » read more

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