tag: hardware security

Logic Locking at the RTL, Leveraging The Behavioral State Transition Coding For Obfuscation (University of Florida)
By Technical Paper Link - 25 Mar, 2023 - Comments: 0

A new technical paper titled "ReTrustFSM: Toward RTL Hardware Obfuscation-A Hybrid FSM Approach" was published by researchers at University of Florida, Gainesville, FL. Abstract: "Hardware obfuscating is a proactive design-for-trust technique against IC supply chain threats, i.e., IP piracy and overproduction. Many studies have evaluated numerous techniques for obfuscation purposes. Neverth... » read more

Hardware-Based Confidential Computing (NIST)
By Technical Paper Link - 10 Mar, 2023 - Comments: 0

NIST has published a draft report, titled “Hardware Enabled Security: Hardware-Based Confidential Computing,” which presents an approach for managing machine identities for protection against malware and other security vulnerabilities. Comments are due April 10, 2023. Abstract "Organizations employ a growing volume of machine identities, often numbering in the thousands or millions per ... » read more

Week In Review: Auto, Security, Pervasive Computing
By Linda Christensen - 10 Mar, 2023 - Comments: 0

Rambus will begin selling Arm's CryptoCell embedded security platform and CryptoIsland root-of-trust cores, setting the stage for a much broader push by Rambus into security for a wide range of connected devices, and ultimately into security as a service. Under the terms of the deal, Rambus' customers will be able to license Arm IP directly from Rambus. For Arm's existing customers, there will ... » read more

Microarchitectural Side-Channel Attacks And Defenses On Non-Volatile RAM
By Technical Paper Link - 04 Mar, 2023 - Comments: 0

A new technical paper titled "NVLeak: Off-Chip Side-Channel Attacks via Non-Volatile Memory Systems" was written (preprint) by researchers at UC San Diego, UT Austin, and Purdue University. Abstract "We study microarchitectural side-channel attacks and defenses on non-volatile RAM (NVRAM) DIMMs. In this study, we first perform reverse-engineering of NVRAMs as implemented by the Intel Optane... » read more

Review of Methods to Design Secure Memristor Computing Systems
By Technical Paper Link - 27 Feb, 2023 - Comments: 0

A technical paper titled "Review of security techniques for memristor computing systems" was published by researchers at Israel Institute of Technology, Friedrich Schiller University Jena (Germany), and Leibniz Institute of Photonic Technology (IPHT). Abstract "Neural network (NN) algorithms have become the dominant tool in visual object recognition, natural language processing, and robotic... » read more

Formal Processor Model Providing Secure Speculation For The Constant-Time Policy
By Technical Paper Link - 24 Feb, 2023 - Comments: 0

A technical paper titled "ProSpeCT: Provably Secure Speculation for the Constant-Time Policy (Extended version)" was published by researchers at imec-DistriNet at KU Leuven, CEA, List, Université Paris Saclay and INRIA. Abstract: "We propose ProSpeCT, a generic formal processor model providing provably secure speculation for the constant-time policy. For constant-time programs under a no... » read more

HW-SW Co-Design Solution For Building Side-Channel-Protected ML Hardware
By Technical Paper Link - 19 Feb, 2023 - Comments: 0

A technical paper titled "Hardware-Software Co-design for Side-Channel Protected Neural Network Inference" was published (preprint) by researchers at North Carolina State University and Intel. Abstract "Physical side-channel attacks are a major threat to stealing confidential data from devices. There has been a recent surge in such attacks on edge machine learning (ML) hardware to extract the... » read more

Detecting Hardware Trojans In a RISC-V Core’s Post-Layout Phase
By Technical Paper Link - 08 Feb, 2023 - Comments: 0

A new technical paper "Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans - A RISC-V Case Study" was published by researchers at University of Bremen, DFKI GmbH, and the German Aerospace Center. Abstract: "With the exponential increase in the popularity of the RISC-V ecosystem, the security of this platform must be re-evaluated especially for mission-critical and IoT d... » read more

RSFQ Logic Based Logic Locking Technique For Immunizing Against SAT-Based Attacks
By Technical Paper Link - 08 Feb, 2023 - Comments: 0

A new technical paper titled "C-SAR: SAT Attack Resistant Logic Locking for RSFQ Circuits" was published (preprint) by researchers at University of Southern California. Abstract: "Since the development of semiconductor technologies, exascale computing and its associated applications have required increasing degrees of efficiency. Semiconductor-transistor-based circuits (STbCs) have strugg... » read more

Side-Channel Attacks Via Cache On the RISC-V Processor Configuration
By Technical Paper Link - 29 Jan, 2023 - Comments: 0

A technical paper titled "A cross-process Spectre attack via cache on RISC-V processor with trusted execution environment" was published by researchers at University of Electro-Communication, Academy of Cryptography Techniques, Technology Research Association of Secure IoT Edge Application based on RISC-V Open Architecture (TRASIO), and AIST. "This work proposed a cross-process exploitation ... » read more

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