Chiplets: Where Are We Today?


The 3rd annual Chiplet Summit was held in Santa Clara from January 21st to 23rd at the Convention Center. The conference continues to grow from its 1st year when it was held at the San Jose Doubletree Hotel (almost exactly 2 years ago). During his Chairman’s Welcome presentation, Chuck Sobey mentioned that there were 41 exhibitors at this year’s conference. Chuck was also the moderator f... » read more

Assembly Design Rules Slowly Emerge


Process design kits (PDKs) play an essential in ensuring that silicon technology can proceed from one generation to the next in a manner that design tools can keep up with. No such infrastructure has been needed for packaging in the past, but that's beginning to change with advanced packages. Heterogeneous assemblies are still ramping up, but their benefits are attracting new designs. “Chi... » read more

New Class Of Memory: Managed-Retention Memory or MRM (Microsoft Research)


A new technical paper titled "Managed-Retention Memory: A New Class of Memory for the AI Era" was published by researchers at Microsoft. Abstract "AI clusters today are one of the major uses of High Bandwidth Memory (HBM). However, HBM is suboptimal for AI workloads for several reasons. Analysis shows HBM is overprovisioned on write performance, but underprovisioned on density and read band... » read more

Choosing The Right Memory Solution For AI Accelerators


To meet the increasing demands of AI workloads, memory solutions must deliver ever-increasing performance in bandwidth, capacity, and efficiency. From the training of massive large language models (LLMs) to efficient inference on endpoint devices, choosing the right memory technology is critical for chip designers. This blog explores three leading memory solutions—HBM, LPDDR, and GDDR—and t... » read more

Ammonia Plasma Surface Treatment for Improved Cu–Cu Bonding Reliability


A new technical paper titled "Ammonia Plasma Surface Treatment for Enhanced Cu–Cu Bonding Reliability for Advanced Packaging Interconnection" was published by researchers at Myongji University. Abstract "With the emergence of 3D stacked semiconductor products, such as high-bandwidth memory, bonding-interface reliability cannot be overemphasized. The condition of the surface interface befo... » read more

Redefining XPU Memory For AI Data Centers Through Custom HBM4: Part 3


This is the third and final of a series from Alphawave Semi on HBM4 and gives and examines custom HBM implementations. Click here for part 1, which gives an overview of the HBM standard, and here for part 2, on HBM implementation challenges. This follows on from our second blog, where we discussed the substantial improvements high bandwidth memory (HBM) provides over traditional memory tec... » read more

Is In-Memory Compute Still Alive?


In-memory computing (IMC) has had a rough go, with the most visible attempt at commercialization falling short. And while some companies have pivoted to digital and others have outright abandoned the technology, developers are still trying to make analog IMC a success. There is disagreement regarding the benefits of IMC (also called compute-in-memory, or CIM). Some say it’s all about reduc... » read more

Redefining XPU Memory For AI Data Centers Through Custom HBM4: Part 2


This is the second in a three-part series from Alphawave Semi on HBM4 and gives insights into HBM implementation challenges. Click here for part 1, for an overview on HBM, and in part 3, we will introduce details of a custom HBM implementation. Implementing a 2.5D System-in-Package (SiP) with High Bandwidth Memory (HBM) is a complex process that spans across architecture definition, designi... » read more

The Evolution of HBM


High-bandwidth memory originally was conceived as a way to increase capacity in memory attached to a 2.5D package. It has since become a staple for all high-performance computing, in some cases replacing SRAM for L3 cache. Archana Cheruliyil, senior product marketing manager at Alphawave Semi, talks about how and where HBM is used today, how it will be used in the future, why it is essential fo... » read more

Redefining XPU Memory For AI Data Centers Through Custom HBM4: Part 1


This is the first of a three-part series on HBM4 and gives an overview of the HBM standard. Part 2 will provide insights on HBM implementation challenges, and part 3 will introduce the concept of a custom HBM implementation. Relentless growth in data consumption Recent advances in deep learning have had a transformative effect on artificial intelligence (AI) and the ever-increasing volume of ... » read more

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