tag: HBM2

Choosing The Right Interconnect
By Ed Sperling - 09 Apr, 2018 - Comments: 3

Efforts to zero in on cheaper advanced packaging approaches that can speed time to market are being sidetracked by a dizzying number of choices. At the center of this frenzy of activity is the [getkc id="36" kc_name="interconnect"]. Current options range from organic, silicon and glass interposers, to bridges that span different die at multiple levels. There also are various fan-out approach... » read more

How To Choose The Right Memory
By Ann Mutschler - 02 Apr, 2018 - Comments: 0

When it comes to designing memory, there is no such thing as one size fits all. And given the long list of memory types and usage scenarios, system architects must be absolutely clear on the system requirements for their application. A first decision is whether or not to put the memory on the logic die as part of the SoC, or keep it as off-chip memory. "The tradeoff between latency and th... » read more

In Case You Missed It
By Mike Gianfagna - 25 Jan, 2018 - Comments: 0

We recently held two very successful seminars in Tokyo and Shanghai. Samsung Memory presented their HBM2 solutions, Samsung Foundry talked about their advanced 14nm FinFET solutions, ASE Group reviewed their advanced 2.5D packaging solutions, eSilicon presented our ASIC and 2.5D design/implementation and IP solutions, Rambus detailed their high-performance SerDes solutions and Northwest Logic p... » read more

Predictions: Manufacturing, Devices And Companies
By Brian Bailey - 18 Jan, 2018 - Comments: 0

Some predictions are just wishful thinking, but most of these are a lot more thoughtful. They project what needs to happen for various markets or products to become successful. Those far reaching predictions may not fully happen within 2018, but we give everyone the chance to note the progress made towards their predictions at the end of the year. (See Reflection On 2017: Design And EDA and Man... » read more

What’s Next?
By Mike Gianfagna - 21 Dec, 2017 - Comments: 0

We just concluded two very successful seminars in Tokyo and Shanghai. Samsung Memory presented their HBM2 solutions, Samsung Foundry talked about their advanced 14nm FinFET solutions, ASE Group reviewed their advanced 2.5D packaging solutions, eSilicon presented our ASIC and 2.5D design/implementation and IP solutions, Rambus detailed their high-performance SerDes solutions and Northwest Logic ... » read more

Pushing DRAM’s Limits
By Kevin Fogarty - 14 Dec, 2017 - Comments: 1

If humans ever do create a genuinely self-aware artificial intelligence, it may well exhibit the frustration of waiting for data arrive. The access bandwidth of DRAM-based computer memory has improved by a factor of 20x over the past two decades. Capacity increased 128x during the same period. But latency improved only 1.3x, according to Kevin Chang, a researcher at Carnegie Mellon Universit... » read more

Move Data Or Process In Place?
By Brian Bailey - 26 Oct, 2017 - Comments: 0

Should data move to available processors or should processors be placed close to memory? That is a question the academic community has been looking at for decades. Moving data is one of the most expensive and power-consuming tasks, and is often the limiter to system performance. Within a chip, Moore's Law has enabled designers to physically move memory closer to processing, and that has rema... » read more

Memory Test Challenges, Opportunities
By Jeff Dorsch - 18 Oct, 2017 - Comments: 0

The semiconductor capital equipment market is on fire, and the memory chip test equipment sector is no different. But it is getting much more difficult on the memory side. Memory test vendors are contending with next-generation devices, such as 3D NAND flash memories, HBM2 chips, low-power double-data-rate DRAMs, graphics DRAMs, phase-change memories, magnetoresistive RAMs, and resistive RAM... » read more

Data Centers Turn To New Memories
By Ann Mutschler - 12 Oct, 2017 - Comments: 3

DRAM extensions and alternatives are starting to show up inside of data centers as the volume of data being processed, stored and accessed continues to skyrocket. This is having a big impact on the architecture of data centers, where the goal now is to move processing much closer to the data and to reduce latency everywhere. Memory has always been a key piece of the Von Neumann compute archi... » read more

IP Biz Changes As Markets Fragment
By Ed Sperling - 22 Aug, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss IP protection, tracking and reuse with Srinath Anantharaman, CEO of [getentity id="22203" e_name="ClioSoft"]; Jeff Galloway, CTO of Silicon Creations; Marc Greenberg, group director of product marketing for [getentity id="22032" e_name="Cadence"]'s IP Group; and John Koeter, vice president of marketing for [getentity id="22035" e_name="Synopsys"]' S... » read more

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