Designing into A Foundry Low-Power High-k Metal Gate 28nm CMOS Solution


28nm Super Low Power is the low power CMOS offering delivered on a bulk silicon substrate for mobile consumer and digital consumer applications. The 28nm process technology is slated to become the foundation for a new generation of portable electronics that are capable of handling streaming video, data, voice, social networking and mobile commerce applications. To view this white paper, clic... » read more

All Indicators Point North


Designing and producing chips has always been difficult, but the number of things that conspire to make it harder at 20nm is the longest in the history of the semiconductor industry. The list will grow longer still at 14nm and beyond, not to mention so expensive that one mistake will kill a company. While system engineers and architects look at the challenges on the front end, the problems ... » read more

The Challenges Of 28nm HKMG


28nm Super Low Power (28nm-SLP) is the low power CMOS offering delivered on a bulk silicon substrate for mobile consumer and digital consumer applications. This technology has four Vt's (high, regular, low and super low) for design flexibility with multi-channel length capability and offers the ultimate in small die size and low cost. Multiple SRAM bit cells for high density and high-performanc... » read more

How Long Will 28nm Last?


By Ann Steffora Mutschler As soon as a next generation semiconductor manufacturing process node is out, bets are taken on just how long the current advanced process node will last. The 28/20nm transition is no exception. There is certainly a benefit to moving from 40nm to 28nm. The  availability of high-k/metal gate technology offers quite a few advantages in terms of power reduction... » read more

Qualcomm Shies Away From High-k At 28nm


By David Lammers Qualcomm CDMA Technologies said it will not use a high-k/metal gate (HKMG) process for most of the chips it makes at the 28 nm node, sticking with a poly/SiON gate stack. The company described the rationale behind the strategy, which because of Qualcomm’s size will have a major impact on the foundry business, at the 2010 International Electron Devices Meeting (IEDM) held in ... » read more

Power Optimization Below 28nm


By Pallab Chatterjee Process scaling has normally been performed on a lithographic basis, but as processes dip below 32nm there are optimization options beyond the lithographic and area reduction. The Common Platform Group and GlobalFoundries have added the tradeoffs of power and performance optimization in addition to area in their 28nm flows. TSMC uses a five-way optimization that also h... » read more

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