Week In Review: Design, Low Power

By Jesse Allen - 14 Aug, 2020 - Comments: 0

Cadence added new machine learning functionality to its Xcelium Logic Simulator to speed verification closure on randomized regressions. Xcelium ML directly interfaces to the simulation kernel and learns iteratively over an entire simulation regression, guiding the Xcelium randomization kernel on subsequent regression runs to achieve matching coverage with reduced simulation cycles. Kioxia adop... » read more

System-in-Package For Heterogeneous Designs

By Paul McLellan - 12 Dec, 2019 - Comments: 1

System integration is increasingly being done using 3D packaging technologies rather than integrating everything onto a huge SoC. One motivation is the ability to not just to split up a design in a single process, but to package die from different processes. Sometimes there are economic reasons. Several presentations at HOT CHIPS had a partition of the design into the processor itself, and a... » read more

Chiplets, Faster Interconnects, More Efficiency

By Ed Sperling - 22 Aug, 2019 - Comments: 1

Big chipmakers are turning to architectural improvements such as chiplets, faster throughput both on-chip and off-chip, and concentrating more work per operation or cycle, in order to ramp up processing speeds and efficiency. Taken as a whole, this represents a significant shift in direction for the major chip companies. All of them are wrestling with massive increases in processing demands ... » read more

Finding Security Holes In Hardware

By Ed Sperling - 06 Sep, 2018 - Comments: 0

At least three major security holes in processors were identified by Google's Project Zero over the past year, with more expected to roll out in coming months. Now the question is what to do about them. Since the beginning of the PC era, two requirements for hardware were backward compatibility and improvements in performance with each new version of processors. No one wants to replace their... » read more

Flexible, Energy-Efficient Neural Network Processing At 16nm

By Geoff Tate - 06 Sep, 2018 - Comments: 0

At Hot Chips 30, held in August in Silicon Valley, Harvard University (Paul Whatmough, SK Lee, S Xi, U Gupta, L Pentecost, M Donato, HC Hseuh, Professor Brooks and Professor Gu) made a presentation on “SMIV: A 16nm SoC with Efficient and Flexible DNN Acceleration for Intelligent IOT Devices. ” (Their complete presentation is available now on the Hot Chips website for attendees and will be p... » read more

Week In Review: Design, Low Power

By Jesse Allen - 24 Aug, 2018 - Comments: 0

Wafer company Soitec and European missile manufacturer MBDA joined together to buy the assets of Dolphin Integration. The IP and EDA tool provider, founded in 1985 in Grenoble, France, has been struggling, recently concluding insolvency proceedings and going into receivership. The new joint venture will absorb Dolphin's 155 employees and be owned 60% by Soitec, 40% by MBDA. The two companies co... » read more

Architects Firmly In Control

By Ed Sperling - 23 Aug, 2018 - Comments: 0

Moore's Law isn't dead, but it certainly isn't what it used to be. While there may be three or four more generations of node shrinks ahead, the power/performance benefits of scaling are falling off. This is evident in new chip architectures that were introduced at this year's Hot Chips conference. Originally started to show off the latest CPUs and co-processors, in past years the focus has b... » read more

Week in Review: IoT, Security, Auto

By Jeff Dorsch - 17 Aug, 2018 - Comments: 0

Cybersecurity Check Point Software Technologies reports that facsimile machines (yes, people still use them!) can be subject to hacking through vulnerabilities in their communication protocols. The HP Officejet Pro All-in-One fax printers and other fax machines can be compromised with a hacker only knowing a fax number, according to the company. Check Point Research says a design flaw in Andro... » read more

Focus Shifts To Architectures

By Ed Sperling - 08 Sep, 2016 - Comments: 1

Chipmakers increasingly are relying on architectural and micro-architectural changes as the best hope for improving power and performance across a spectrum of markets, process nodes and price points. While discussion about the death of [getkc id="74" comment="Moore's Law"] predates the 1-micron process node, there is no question that it is getting harder for even the largest chipmakers to st... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Hot Chips

Week In Review: Design, Low Power

System-in-Package For Heterogeneous Designs

Chiplets, Faster Interconnects, More Efficiency

Finding Security Holes In Hardware

Flexible, Energy-Efficient Neural Network Processing At 16nm

Week In Review: Design, Low Power

Architects Firmly In Control

Week in Review: IoT, Security, Auto

Focus Shifts To Architectures