Chip Industry Technical Paper Roundup: Apr. 1


New technical papers recently added to Semiconductor Engineering’s library: [table id=416 /] Find more semiconductor research papers here. » read more

GPU Analysis Identifying Performance Bottlenecks That Cause Throughput Plateaus In Large-Batch Inference


A new technical paper titled "Mind the Memory Gap: Unveiling GPU Bottlenecks in Large-Batch LLM Inference" was published by researchers at Barcelona Supercomputing Center, Universitat Politecnica de Catalunya, and IBM Research. Abstract "Large language models have been widely adopted across different tasks, but their auto-regressive generation nature often leads to inefficient resource util... » read more

Chip Industry Week In Review


Semiconductor industry energy consumption grew 125% between 2015 and 2023, while direct greenhouse gas emissions rose 23% in the same period, according to the Europe think tank Interface, which analyzed corporate social responsibility reports from 28 global chip manufacturers. CSIS' new report "Understanding U.S. Allies’ Current Legal Authority to Implement AI and Semiconductor Export Cont... » read more

Interconnects Approach Tipping Point


As leading devices move to next generation nanosheets for logic, their interconnections are getting squeezed past the point where they can deliver low resistance pathways. The 1nm (10Å) node will have 20nm pitch and larger metal lines, but the interconnect stack already consumes a third of device power and accounts for 75% of the chip's RC delay. Changing this dynamic requires a superior co... » read more

Novel NorthPole Architecture Enables Low-Latency, High-Energy-Efficiency LLM inference (IBM Research)


A new technical paper titled "Breakthrough low-latency, high-energy-efficiency LLM inference performance using NorthPole" was published by researchers at IBM Research. At the IEEE High Performance Extreme Computing (HPEC) Virtual Conference in September 2024, new performance results for their AIU NorthPole AI inference accelerator chip were presented on a 3-billion-parameter Granite LLM. ... » read more

Chip Industry Technical Paper Roundup: Sept. 24


New technical papers recently added to Semiconductor Engineering’s library: [table id=358 /] More ReadingTechnical Paper Library home » read more

Characteristics and Potential HW Architectures for Neuro-Symbolic AI


A new technical paper titled "Towards Efficient Neuro-Symbolic AI: From Workload Characterization to Hardware Architecture" was published by researchers at Georgia Tech, UC Berkeley, and IBM Research. Abstract: "The remarkable advancements in artificial intelligence (AI), primarily driven by deep neural networks, are facing challenges surrounding unsustainable computational trajectories, li... » read more

Chip Industry Technical Paper Roundup: Sept. 17


New technical papers recently added to Semiconductor Engineering’s library: [table id=356 /] More ReadingTechnical Paper Library home » read more

Analog In-Memory Computing: Fast Deep NN Training (IBM Research)


A new technical paper titled "Fast and robust analog in-memory deep neural network training" was published by researchers at IBM Research. Abstract "Analog in-memory computing is a promising future technology for efficiently accelerating deep learning networks. While using in-memory computing to accelerate the inference phase has been studied extensively, accelerating the training phase has... » read more

Plasma Etching : Challenges And Options Going Forward (UMD, IBM, Lam Research, Intel, Samsung et al.)


A new technical paper titled "Future of plasma etching for microelectronics: Challenges and opportunities" was published by researchers from numerous academic institutions and companies, including University of Maryland, IBM, Arkema, UCLA, Lam Research, Intel Corporation, Samsung, Air Liquide, Sony, and many others. Abstract: "Plasma etching is an essential semiconductor manufacturing techn... » read more

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