Chip Industry’s Technical Paper Roundup: Feb. 14


New technical papers recently added to Semiconductor Engineering’s library: [table id=80 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Week In Review: Design, Low Power


Worldwide semiconductor revenue increased 1.1% in 2022 to $601.7 billion, up from $595 billion in 2021, according to preliminary results from Gartner. The combined revenue of the top 25 semiconductor vendors increased 2.8% in 2022 and accounted for 77.5% of the market. The memory segment posted a 10% revenue decrease. Analog showed the strongest growth, up 19% from 2021, followed by discretes, ... » read more

Can ML Help Verification? Maybe


Functional verification produces an enormous amount of data that could be used to train a machine learning system, but it's not always clear which data is useful or whether it can help. The challenge with ML is understanding when and where to use it, and how to integrate it with other tools and approaches. With a big enough hammer, it is tempting to call everything a nail, and just throwing ... » read more

Cryogenic CMOS Becomes Cool


Cryogenic CMOS is a technology on the cusp, promising higher performance and lower power with no change in fabrication technology. The question now is whether it becomes viable and mainstream. Technologies often appear to be just on the horizon, not quite making it, but never too far out of sight. That's usually because some issue plagues it, and the incentive is not big enough to solve the ... » read more

Week In Review, Manufacturing, Test


The U.S. is attempting to restrict sales of ASML’s deep ultra-violet (DUV) litho systems to China, according to a report from Bloomberg. The U.S. has been working to limit China's access to advanced technology for some time, and it has already limited sales of extreme ultra-violet (EUV), which is used to develop chips at the most advanced process nodes. DUV, in contrast, is used for older-nod... » read more

Technical Paper Round-Up: June 28


New technical papers added to Semiconductor Engineering’s library this week. [table id=35 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit f... » read more

OTA On-Chip Computing That Conquers A Bottleneck In Wired NoC Architectures


New research paper titled "Wireless On-Chip Communications for Scalable In-memory Hyperdimensional Computing" from researchers at IBM Research, Zurich Switzerland and Universitat Politecnica de Catalunya, Barcelona, Spain Abstract: "Hyperdimensional computing (HDC) is an emerging computing paradigm that represents, manipulates, and communicates data using very long random vectors (aka hyp... » read more

Technical Paper Round-up: May 17


New technical papers added to Semiconductor Engineering’s library this week. [table id=27 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a go... » read more

ASD process that was performed in situ on the etch chamber


New research paper entitled "Plasma-based area selective deposition for extreme ultraviolet resist defectivity reduction and process window improvement" from TEL Technology Center, Americas and IBM Research. Abstract: "Extreme ultraviolet (EUV) lithography has overcome significant challenges to become an essential enabler to the logic scaling roadmap. However, it remains limited by stocha... » read more

Week In Review: Design, Low Power


Tools Synopsys introduced a new model for using its EDA tools on the cloud. Synopsys Cloud provides pay-as-you-go access to the company's cloud-optimized design and verification products, with pre-optimized infrastructure on Microsoft Azure to address higher levels of interdependencies in chip development. "As more design flows incorporate AI, requiring even more resources, the virtually unlim... » read more

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