DRAM scaling sans EUV
At the recent IEEE International Electron Devices Meeting (IEDM) in Washington, D.C., chipmakers presented papers on several technologies, including one unlikely topic—DRAM scaling.
For years, it was believed that DRAMs would hit the wall and stop scaling at 20nm or so. Then, at that point, the industry would need to migrate to a 3D DRAM structure or a next-generatio...
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