tag: Imperas Software

Stretching Engineers
By Brian Bailey - 22 Dec, 2020 - Comments: 1

Engineering has one constant — you innovate or fall by the wayside. That is true both for the things that are designed and for the engineers who design and build them. Today’s systems are putting new strains on engineers who can no longer be "tall and thin" or "short and fat." Those descriptions pertain to an engineer who is either highly specialized or one who has much broader experience. ... » read more

Multicore Debug Evolves To The System-Level
By Ann Mutschler - 22 Dec, 2020 - Comments: 0

The proliferation and expansion of multicore architectures is making debug much more difficult and time-consuming, which in turn is increasing demand for more comprehensive system-level tools and approaches. Multicore/multiprocessor designs are the most complex devices to debug. More interactions and interdependencies between cores mean more things possibly can go wrong. In fact, so many pro... » read more

Week In Review: Design, Low Power
By Jesse Allen - 11 Dec, 2020 - Comments: 0

RISC-V RISC-V International CEO Calista Redmond provided an update on the state of the community during the annual RISC-V Summit: “RISC-V has had an incredible year of growth and momentum. This year, our technical community has grown 66 percent to more than 2,300 individuals in our more than 50 technical and special interest groups. We’re seeing increased market momentum of RISC-V cores, S... » read more

Week In Review: Design, Low Power
By Jesse Allen - 04 Dec, 2020 - Comments: 0

Xilinx acquired the assets of Falcon Computing Solutions, a provider of high-level synthesis (HLS) compiler optimization technology for hardware acceleration of software applications. The acquisition will be integrated into the Xilinx Vitis Unified Software Platform to automate hardware-aware optimizations of C++ applications with minimal hardware expertise. “Our compiler provides a high degr... » read more

Forward And Backward Compatibility In IC Designs
By Ann Mutschler - 30 Nov, 2020 - Comments: 0

Future-proofing of designs is becoming more difficult due to the accelerating pace of innovation in architectures, end markets, and technologies such as AI and machine learning. Traditional approaches for maintaining market share and analyzing what should be in the next rev of a product are falling by the wayside. They are being replaced by best-guesses about market trends and a need to bala... » read more

Silo Busting In The Design Flow
By Brian Bailey - 24 Nov, 2020 - Comments: 0

An increasing number of dependencies in system design are forcing companies, people, tools, and flows to become more collaborative. Design and EDA companies must adapt to this new reality because it has become impossible for anyone to do it all by themselves. Moreover, what happens in manufacturing and packaging needs to be considered up front, and what gets designed in the design phase may ... » read more

Using AI And Bugs To Find Other Bugs
By Ann Mutschler - 24 Nov, 2020 - Comments: 0

Debug is starting to be rethought and retooled as chips become more complex and more tightly integrated into packages or other systems, particularly in safety- and mission-critical applications where life expectancy is significantly longer. Today, the predominant bug-finding approaches use the ubiquitous constrained random/coverage driven verification technology, or formal verification techn... » read more

RISC-V Custom Instruction Flow Application Note
By Imperas - 23 Nov, 2020 - Comments: 0

A RISC-V processor has several defined decode spaces, for example custom0, custom1 etc. into which new custom instructions can be added. OVP Fast processor models can be extended without modification to the pre-compiled and verified base processor model source code using one or more extension libraries. An extension library can be loaded as part of a virtual platform definition in addition to t... » read more

Components For Open-Source Verification
By Brian Bailey - 02 Sep, 2020 - Comments: 2

Defining an open-source verification methodology is a lot more difficult than just developing an open-source simulator. This is the reality facing open-source hardware such as RISC-V. Some people may be asking for the corresponding open-source verification, but that is a much tougher problem — and it is not going to be solved in the short term. Part one examined the reasons why open-source... » read more

Open-Source Hardware Momentum Builds
By Brian Bailey - 25 Jun, 2020 - Comments: 2

Open-source hardware continues to gain ground, spearheaded by RISC-V — despite the fact that this processor technology is neither free nor simple to use. Nevertheless, the open-source hardware movement has established a solid foothold after multiple prior forays that yielded only limited success, even for processors. With demand for more customized hardware, and a growing field of startups... » read more

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