tag: Imperas

Week In Review: Design, Low Power
By Jesse Allen - 03 Dec, 2021 - Comments: 0

Infineon Technologies acquired Syntronixs Asia, which specializes in precision electroplating, a key process in the assembly process of semiconductors. Syntronixs Asia has a workforce of more than 500 people and has been a major service provider for Infineon since 2009. “Through this acquisition, we have made another important step to strengthen the resilience of our supply chain,” said Tho... » read more

Product Lifecycle Management For Semiconductors
By Brian Bailey - 23 Nov, 2021 - Comments: 1

Product lifecycle management (PLM) and the semiconductor industry have always been separate, but pressure is growing to integrate them. Automotive, IIoT, medical, and other industries see that as the only way to manage many aspects of their business, and as it stands, semiconductors are a large black box in that methodology. The technology space is driven by a mix of top down and bottom-up p... » read more

Gaps In The AI Debug Process
By Brian Bailey - 23 Nov, 2021 - Comments: 0

When an AI algorithm is deployed in the field and gives an unexpected result, it's often not clear whether that result is correct. So what happened? Was it wrong? And if so, what caused the error? These are often not simple questions to answer. Moreover, as with all verification problems, the only way to get to the root cause is to break the problem down into manageable pieces. The semico... » read more

What’s Next For Emulation
By Brian Bailey - 28 Oct, 2021 - Comments: 0

Emulation is now the cornerstone of verification for advanced chip designs, but how emulation will evolve to meet future demands involving increasingly dense, complex, and heterogeneous architectures isn't entirely clear. EDA companies have been investing heavily in emulation, increasing capacity, boosting performance, and adding new capabilities. Now the big question is how else they can le... » read more

Week In Review: Design, Low Power
By Jesse Allen - 22 Oct, 2021 - Comments: 0

Tools Cadence's digital and custom/analog flows were certified for TSMC's N3 and N4 process technologies. Updates for the digital flow includes efficient processing of large libraries, additional accuracy during library cell characterization and static timing analysis, and support for accurate leakage calculation required in N3 and static power calculation for new N3 cells. Synopsys' digita... » read more

EDA Vendors Widen Use Of AI
By Ed Sperling - 29 Sep, 2021 - Comments: 0

EDA vendors are widening the use of AI and machine learning to incorporate multiple tools, providing continuity and access to consistent data at multiple points in the semiconductor design flow. While gaps remain, early results from a number of EDA tools providers point to significant improvements in performance, power, and time to market. AI/ML has been deployed for some time in EDA. Still,... » read more

Optimization Driving Changes In Microarchitectures
By Ann Mutschler - 23 Sep, 2021 - Comments: 0

The semiconductor ecosystem is at a turning point for how to best architect the CPU based on the explosion of data, the increased usage of AI, and the need for differentiation and customization in leading-edge applications. In the past, much of this would have been accomplished by moving to the next process node. But with the benefits from scaling diminishing at each new node, the focus is s... » read more

Containing The Explosion In Data
By Brian Bailey - 23 Sep, 2021 - Comments: 0

The amount of data that could be kept for every design is gargantuan, but even that may not be enough these days as lifecycle management, continuous verification, regulatory requirements, and globalization add to the data that needs to be stored. But data has no value if it cannot be found or used in ways that provide more benefit than the cost of storing it. "Data management is not unique t... » read more

RISC-V Processor Verification: Case Study
By Imperas - 22 Sep, 2021 - Comments: 0

Abstract: The open RISC-V instruction set architecture is gaining traction with both semiconductor vendors and systems companies. A key question is how to verify the RISC-V processor implementation, especially when developing the RTL and/or adding custom instructions? This paper reports on the techniques used and lessons learned for the verification of a RV64IMACBNSU RISC-V processor by an exp... » read more

Tradeoffs Between Edge Vs. Cloud
By Brian Bailey - 09 Sep, 2021 - Comments: 0

Increasing amounts of processing are being done on the edge, but how the balance will change between what's computed in the cloud versus the edge remains unclear. The answer may depend as much on the value of data and other commercial reasons as on technical limitations. The pendulum has been swinging between doing all processing in the cloud to doing increasing amounts of processing at the ... » read more

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