tag: in-memory computing

Ferroelectric Tunnel Junctions In Crossbar Array Analog In-Memory Compute Accelerators
By Technical Paper Link - 11 Jan, 2024 - Comments: 0

A technical paper titled “Ferroelectric Tunnel Junction Memristors for In-Memory Computing Accelerators” was published by researchers at Lund University. Abstract: "Neuromorphic computing has seen great interest as leaps in artificial intelligence (AI) applications have exposed limitations due to heavy memory access, with the von Neumann computing architecture. The parallel in-memory comp... » read more

Large-Scale Integration Of 2D Materials As The Semiconducting Channel In An In-Memory Processor (EPFL)
By Technical Paper Link - 03 Jan, 2024 - Comments: 0

A technical paper titled “A large-scale integrated vector-matrix multiplication processor based on monolayer molybdenum disulfide memories” was published by researchers at École Polytechnique Fédérale de Lausanne (EPFL). Abstract: "Data-driven algorithms—such as signal processing and artificial neural networks—are required to process and extract meaningful information from the mass... » read more

Stacked Ferroelectric Memory Array Comprised Of Laterally Gated Ferroelectric Field-Effect Transistors
By Technical Paper Link - 10 Nov, 2023 - Comments: 0

A technical paper titled “Laterally gated ferroelectric field effect transistor (LG-FeFET) using α-In2Se3  for stacked in-memory computing array” was published by researchers at Samsung Electronics and Sungkyunkwan University. Abstract: "In-memory computing is an attractive alternative for handling data-intensive tasks as it employs parallel processing without the need for data transfe... » read more

FeFET Multi-Level Cells For In-Memory Computing In 28nm
By Technical Paper Link - 19 Oct, 2023 - Comments: 0

A technical paper titled “First demonstration of in-memory computing crossbar using multi-level Cell FeFET” was published by researchers at Robert Bosch, University of Stuttgart, Indian Institute of Technology Kanpur, Fraunhofer IPMS, RPTU Kaiserslautern-Landau, and Technical University of Munich. Abstract: "Advancements in AI led to the emergence of in-memory-computing architectures as a... » read more

SRAM-Based IMC For Cryogenic CMOS Using Commercial 5 nm FinFETs
By Technical Paper Link - 27 Sep, 2023 - Comments: 0

A technical paper titled “Cryogenic In-Memory Computing for Quantum Processors Using Commercial 5-nm FinFETs” was published by researchers at University of Stuttgart, Indian Institute of Technology Kanpur, University of California Berkeley, and Technical University of Munich. Abstract: "Cryogenic CMOS circuits that efficiently connect the classical domain with the quantum world are the co... » read more

A Microfluidics Device That Can Perform ANN Computation On Data Stored In DNA
By Technical Paper Link - 06 Sep, 2023 - Comments: 0

A technical paper titled “Neural network execution using nicked DNA and microfluidics” was published by researchers at University of Minnesota Twin-Cities and Rochester Institute of Technology. Abstract: "DNA has been discussed as a potential medium for data storage. Potentially it could be denser, could consume less energy, and could be more durable than conventional storage media such a... » read more

An Energy-Efficient 10T SRAM In-Memory Computing Macro Architecture For AI Edge Processor
By Technical Paper Link - 28 Aug, 2023 - Comments: 0

A technical paper titled “An energy-efficient 10T SRAM in-memory computing macro for artificial intelligence edge processor” was published by researchers at Atal Bihari Vajpayee-Indian Institute of Information Technology and Management (ABV-IIITM). Abstract: "In-Memory Computing (IMC) is emerging as a new paradigm to address the von-Neumann bottleneck (VNB) in data-intensive applications.... » read more

A Search Framework That Optimizes Hybrid-Device IMC Architectures For DNNs, Using Chiplets
By Technical Paper Link - 08 Aug, 2023 - Comments: 0

A technical paper titled “HyDe: A Hybrid PCM/FeFET/SRAM Device-search for Optimizing Area and Energy-efficiencies in Analog IMC Platforms” was published by researchers at Yale University. Abstract: "Today, there are a plethora of In-Memory Computing (IMC) devices- SRAMs, PCMs & FeFETs, that emulate convolutions on crossbar-arrays with high throughput. Each IMC device offers its own pr... » read more

Comparing Analog and Digital SRAM In-Memory Computing Architectures (KU Leuven)
By Technical Paper Link - 01 Jun, 2023 - Comments: 0

A technical paper titled "Benchmarking and modeling of analog and digital SRAM in-memory computing architectures" was published by researchers at KU Leuven. Abstract: "In-memory-computing is emerging as an efficient hardware paradigm for deep neural network accelerators at the edge, enabling to break the memory wall and exploit massive computational parallelism. Two design models have surge... » read more

Optimizing Projected PCM for Analog Computing-In-Memory Inferencing (IBM)
By Technical Paper Link - 22 May, 2023 - Comments: 0

A new technical paper titled "Optimization of Projected Phase Change Memory for Analog In-Memory Computing Inference" was published by researchers at IBM Research. "A systematic study of the electrical properties-including resistance values, memory window, resistance drift, read noise, and their impact on the accuracy of large neural networks of various types and with tens of millions of wei... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy