Accelerating Inference of Convolutional Neural Networks Using In-memory Computing


Abstract: "In-memory computing (IMC) is a non-von Neumann paradigm that has recently established itself as a promising approach for energy-efficient, high throughput hardware for deep learning applications. One prominent application of IMC is that of performing matrix-vector multiplication in (1) time complexity by mapping the synaptic weights of a neural-network layer to the devices of a... » read more

Accelerating Inference of Convolutional Neural Networks Using In-memory Computing


Abstract: "In-memory computing (IMC) is a non-von Neumann paradigm that has recently established itself as a promising approach for energy-efficient, high throughput hardware for deep learning applications. One prominent application of IMC is that of performing matrix-vector multiplication in (1) time complexity by mapping the synaptic weights of a neural-network layer to the devices of an ... » read more

11 Ways To Reduce AI Energy Consumption


As the machine-learning industry evolves, the focus has expanded from merely solving the problem to solving the problem better. “Better” often has meant accuracy or speed, but as data-center energy budgets explode and machine learning moves to the edge, energy consumption has taken its place alongside accuracy and speed as a critical issue. There are a number of approaches to neural netw... » read more

Tradeoffs To Improve Performance, Lower Power


Generic chips are no longer acceptable in competitive markets, and the trend is growing as designs become increasingly heterogeneous and targeted to specific workloads and applications. From the edge to the cloud, including everything from vehicles, smartphones, to commercial and industrial machinery, the trend increasingly is on maximizing performance using the least amount of energy. This ... » read more

Making Sense Of New Edge-Inference Architectures


New edge-inference machine-learning architectures have been arriving at an astounding rate over the last year. Making sense of them all is a challenge. To begin with, not all ML architectures are alike. One of the complicating factors in understanding the different machine-learning architectures is the nomenclature used to describe them. You’ll see terms like “sea-of-MACs,” “systolic... » read more

FeFETs Bring Promise And Challenges


Ferroelectric FETs (FeFETs) and memory (FeRAM) are generating high levels of interest in the research community. Based on a physical mechanism that hasn’t yet been commercially exploited, they join the other interesting new physics ideas that are in various stages of commercialization. “FeRAM is very promising, but it's like all promising memory technologies — it takes a while to get b... » read more

Data Overload In The Data Center


Dealing with increasing volumes of data inside of data centers requires an understanding of architectures, the flow of data between memory and processors, bandwidth, cache coherency and new memory types and interfaces. Gary Ruggles, senior product marketing manager at Synopsys, talks about how these systems are being revamped to improve performance and reduce power. » read more

Power/Performance Bits: Dec. 7


Logic-in-memory with MoS2 Engineers at École Polytechnique Fédérale de Lausanne (EPFL) built a logic-in-memory device using molybdenum disulfide (MoS2) as the channel material. MoS2 is a three-atom-thick 2D material and excellent semiconductor. The new chip is based on floating-gate field-effect transistors (FGFETs) that can hold electric charges for long periods. MoS2 is particularly se... » read more

Challenges At 3/2nm


David Fried, vice president of computational products at Lam Research, talks about issues at upcoming process nodes, the move to EUV lithography and nanosheet transistors, and how process variation can affect yield and device performance. » read more

Memory Access In AI Systems


Memory access is a key consideration in AI system design. Ron Lowman, strategic marketing manager for IP at Synopsys, talks about how memory affects overall power consumption, why partitioning of on-chip and off-chip is so critical to performance and power, and how this changes from the cloud to the edge. » read more

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