Chip Industry Technical Paper Roundup: Feb. 3


New technical papers recently added to Semiconductor Engineering’s library: [table id=519 /] Find more semiconductor research papers here. » read more

Chip Industry Week In Review


Space Forge autonomously generated plasma aboard its ForgeStar-1 satellite, utilizing extreme low Earth orbit (LEO) conditions needed for gas-phase crystal growth of wide- and ultra-wide bandgap materials, GaN, SiC, aluminum nitride, and diamonds. Copper prices surged to a historic record of $12,600 per metric ton, an increase of more than 40% YOY, which will impact the cost of data center b... » read more

Chip Industry Week in Review


Deals of the week: Arteris announced plans to acquire cybersecurity provider Cycuity. “Expanding our technology portfolio to include Cycuity’s hardware security assurance products will enable our customers to achieve secure on-chip data movement,” said Charlie Janac, chairman and CEO of Arteris. Qualcomm acquired Ventana Micro Systems, a maker of RISC-V data center-class CPU IP. ... » read more

Chip Industry Week in Review


SK hynix is ramping HBM manufacturing capacity to meet explosive demand for AI data centers. The company will launch 16-stack HBM4 next year, and up to 12-stack HBM4E. HBM5 and HBM5E will be introduced between 2029 and 2031, reports Business Korea. China will not have access to NVIDIA’s most advanced chips, President Trump told 60 Minutes. The Dutch economy minister said Nexperia's chip... » read more

Chip Industry Technical Paper Roundup: Oct. 28


New technical papers recently added to Semiconductor Engineering’s library: [table id=486 /] Find more semiconductor research papers here. » read more

Thermal Simulation And Optimization in 3D-IC Design (Intel, UCSB, Cadence)


A new technical paper titled "DeepOHeat-v1: Efficient Operator Learning for Fast and Trustworthy Thermal Simulation and Optimization in 3D-IC Design" was published by researchers at Intel Corporation, University of California, Santa Barbara and Cadence. Abstract "Thermal analysis is crucial in 3D-IC design due to increased power density and complex heat dissipation paths. Although operator ... » read more

Beyond BPD: Backside Clock and Signal Routing for Sub-3nm (UT Austin, Intel)


A new technical paper titled "Beyond Backside Power: Backside Signal Routing as Technology Booster for Standard Cell Scaling" was published by researchers from University of Texas at Austin and Intel. Abstract "Advances in process technology enabling backside metals and contacts offer new Design-Technology Co-Optimization (DTCO) opportunities to further enhance power, performance, and area ... » read more

Chip Industry Technical Paper Roundup: Oct. 13


New technical papers recently added to Semiconductor Engineering’s library: [table id=482 /] Find more semiconductor research papers here. » read more

On-Package Memory With UCIe To Improve Bandwidth Density And Power Efficiency (AMD, Intel Corp.)


A new technical paper titled "On-Package Memory with Universal Chiplet Interconnect Express (UCIe): A Low Power, High Bandwidth, Low Latency and Low Cost Approach" was published by researchers at Intel Corporation and AMD. Abstract "Emerging computing applications such as Artificial Intelligence (AI) are facing a memory wall with existing on-package memory solutions that are unable to meet ... » read more

New Spectre Branch Target Injection, Spectre-BTI, Attack Primitives On CPUs (ETH Zurich)


A new technical paper titled “VMSCAPE: Exposing and Exploiting Incomplete Branch Predictor Isolation in Cloud Environments” was published by researchers at ETH Zurich. Abstract “Virtualization is a cornerstone of modern cloud infrastructures, providing the required isolation to customers. This isolation, however, is threatened by speculative execution attacks which the CPU vendors att... » read more

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