tag: interposers

Architecting Interposers
By Brian Bailey - 14 Oct, 2021 - Comments: 0

An interposer performs a similar function as a printed circuit board (PCB), but when the interposer is moved inside a package the impact is significant. Neither legacy PCB nor IC design tools can fully perform the necessary design and analysis tasks. But perhaps even more important, adding an interposer to a design may require organizational changes. Today, leading-edge companies have shown ... » read more

PCB And IC Technologies Meet In The Middle
By Bryon Moyer - 12 Oct, 2021 - Comments: 1

Surface-mount technology (SMT) is evolving far beyond its roots as a way of assembling packaged chips onto printed circuit boards without through-holes. It is now moving inside packages that will themselves be mounted on PCBs. But SMT for advanced packages isn’t the same as the SMT we’ve been used to. “Many systems include multiple ASICs, a lot of memory, and that's all integrated i... » read more

Power/Performance Bits: Aug. 9
By Jesse Allen - 09 Aug, 2021 - Comments: 0

Capacitors in interposers Scientists at Tokyo Institute of Technology developed a 3D functional interposer containing an embedded capacitor. They tout the design as saving package area and reducing wiring length, resulting in less noise and power consumption. The capacitive elements are embedded inside a 300mm silicon piece using permanent adhesive and mold resin. The interconnects between ... » read more

Chipmakers Getting Serious About Integrated Photonics
By Brian Bailey - 12 Jul, 2021 - Comments: 3

Integrating photonics into semiconductors is gaining traction, particularly in heterogeneous multi-die packages, as chipmakers search for new ways to overcome power limitations and deal with increasing volumes of data. Power has been a growing concern since the end of Dennard scaling, which happened somewhere around the 90nm node. There are more transistors per mm², and the wires are thinne... » read more

Mapping Heat Across A System
By Ann Mutschler - 13 May, 2021 - Comments: 0

Thermal issues are becoming more difficult to resolve as chip features get smaller and systems get faster and more complex. They now require the integration of technologies from both the design and manufacturing flows, making design for power and heat a much broader problem. This is evident with the evolution of a smart phone. Phones sold 10 years ago were very different devices. Functionali... » read more

Many Chiplet Challenges Ahead
By Brian Bailey - 12 Apr, 2021 - Comments: 0

Over the past couple of months, Semiconductor Engineering has looked into several aspects of 2.5D and 3D system design, the emerging standards and steps that the industry is taking to make this more broadly adopted. This final article focuses on the potential problems and what remains to be addressed before the technology becomes sustainable to the mass market. Advanced packaging is seen as ... » read more

Emerging Apps And Challenges For Packaging
By Mark LaPedus - 23 Nov, 2020 - Comments: 0

Advanced packaging is playing a bigger role and becoming a more viable option to develop new system-level chip designs, but it also presents chipmakers with a confusing array of options and sometimes a hefty price tag. Automotive, servers, smartphones and other systems have embraced advanced packaging in one form or another. For other applications, it's overkill, and a simpler commodity pack... » read more

Bonding Issues For Multi-Chip Packages
By Katherine Derbyshire - 19 Nov, 2020 - Comments: 1

The rising cost and complexity of developing chips at the most advanced nodes is forcing many chipmakers to begin breaking up that chip into multiple parts, not all of which require leading edge nodes. The challenge is how to put those disaggregated pieces back together. When a complex system is integrated monolithically — on a single piece of silicon — the final product is a compromise ... » read more

Designs Beyond The Reticle Limit
By Brian Bailey - 12 Nov, 2020 - Comments: 0

Designs continue to grow in size and complexity, but today they are reaching both physical and economic challenges. These challenges are causing a reversal of the integration trend that has provided much of the performance and power gains over the past couple of decades. The industry, far from giving up, is exploring new ways to enable designs to go beyond the reticle size, which is around 8... » read more

Difficult Memory Choices In AI Systems
By Ann Mutschler - 12 Nov, 2020 - Comments: 0

The number of memory choices and architectures is exploding, driven by the rapid evolution in AI and machine learning chips being designed for a wide range of very different end markets and systems. Models for some of these systems can range in size from 10 billion to 100 billion parameters, and they can vary greatly from one chip or application to the next. Neural network training and infer... » read more

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