Why SoC Designers Need Purpose-Built Semiconductor IP Catalog Tools

By Roberto Piacentini Filho - 25 Jul, 2024 - Comments: 0

Semiconductor intellectual property (IP) management, reuse, and change tracking are essential for efficiently creating chip designs based on proven building blocks, reducing your time-to-market, and maintaining good reputations throughout their lifetimes. Unfortunately, many SoC teams attempt to use existing tools like Git for these essential tasks, even though they are unsuitable and inconv... » read more

How To Calculate The ROI Of Semiconductor IP Management

By Keysight - 15 May, 2024 - Comments: 0

Intellectual property (IP) is a vital asset for technology companies. IP is often a critical factor in the valuation of a company and must be protected from accidental damage, leakage, and other negative consequences of poor handling. In the context of silicon companies that work on building silicon chips, the term IP involves overseeing both internal IP developed by the company itself and exte... » read more

Optimizing IP Management For Chiplet-Based Designs

By Emily Yan - 25 Jan, 2024 - Comments: 0

Chiplets are making big waves in the semiconductor industry, with its global market size growing at 71.3% from 2023 to 2031. Through heterogeneous integration of multiple components of different nodes and technologies, design teams are reinvigorating Moore’s law and paving the way for designs featuring multi-billion transistors and hundreds of IP blocks. These chiplet-based designs are a... » read more

Unlocking Efficiency: The Power Of IP Blocks In Silicon Chip Design

By Amit Varde - 14 Sep, 2023 - Comments: 0

The fastest, most efficient and cost-effective way to design silicon is by leveraging intellectual property (IP) blocks. This methodology reduces risk, allows a design team to focus on its own differentiation, and allows scalability. Re-using existing IP offers even more value for design teams. But not every company has embraced the approach. Here’s why you should consider it. To optimize ... » read more

Importance Of Qualifying IP Revisions

By Siddharth Ravikumar - 30 Jan, 2023 - Comments: 0

Design intellectual property (IP) is the fundamental building block of the modern system on chip (SoC). As the scale and complexity of SoCs increases, usage of design IP blocks also increases rapidly, as they enable modularization and re-use of design components. As a result, the usage of design IP has grown rapidly in the past decade. An IP data library consists of many views and formats, w... » read more

Growing System Complexity Drives More IP Reuse

By Ann Mutschler - 12 Jan, 2023 - Comments: 1

IP reuse of both third-party and internal IP is growing, but it's also becoming more complex to manage. There is more IP being used, and more systems into which it needs to be integrated, combined with other IP, and tracked throughout an organization. In some cases, this is an economic requirement. In others, designs are so complex that engineering teams need to focus on where they will make... » read more

Chip Design Teams And Restaurant Kitchen Staff Have A Lot In Common

By Cliosoft - 22 Nov, 2021 - Comments: 0

By Anagha Pandharpurkar Believe it or not, electronic device and systems-design teams have a lot in common with kitchen staff in big commercial restaurants: They both leverage many different tools and resources to churn out great products in a high-pressure environment to a demanding audience that wants it now, not tomorrow. Unfortunately, design teams are often not nearly as well equippe... » read more

Maximize The Value Of Your 3rd Party IP Investment

By Srinath Anantharaman - 18 May, 2021 - Comments: 0

The need to get to market sooner has resulted in significant growth in the use of 3rd party IP. This in turn has led to a growth in IP vendors. While licensing 3rd party IP may lead to reducing the development effort and time, it can potentially be costly and bring upon significant risk. Of course, there is the obvious cost of licensing the IP itself, but there are several other hidden costs... » read more

Tracking Re-Use Of Design IPs

By Amit Varde - 24 Feb, 2020 - Comments: 0

Design teams have a great incentive to create design blocks or IPs that can be reused: Each time an IP is successfully reused, precious time is saved from project schedule. Of course, as easy as it sounds, achieving this goal in real life is not simple. In reality, the observation is that design libraries cannot be used as-is by multiple projects. Consider this scenario: A smart new graduate... » read more

SOC Design & IP Management—A Must For Functional Verification

By Cliosoft - 05 Jun, 2019 - Comments: 0

As a part of the verification flow, verification teams perform different types of simulations based on the nature of the design. The simulations include digital logic functional simulations, mixed-signal functional simulations, power-aware simulations, formal verification runs and gate-level simulations. For a signoff, all planned tests must pass in all four types of simulations. In addition t... » read more

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Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: IP management