tag: IR drop

Machine Learning-Based IR Drop Prediction Approach
By Technical Paper Link - 25 Feb, 2025 - Comments: 0

A new technical paper titled "Estimating Voltage Drop: Models, Features and Data Representation Towards a Neural Surrogate" was published by researchers at KTH Royal Institute of Technology and Ericsson Research. ABSTRACT "Accurate estimation of voltage drop (IR drop) in modern Application-Specific Integrated Circuits (ASICs) is highly time and resource demanding, due to the growing complex... » read more

Power Delivery Challenges in 3D HI CIM Architectures for AI Accelerators (Georgia Tech)
By Technical Paper Link - 07 Feb, 2025 - Comments: 0

A new technical paper titled "Co-Optimization of Power Delivery Network Design for 3D Heterogeneous Integration of RRAM-based Compute In-Memory Accelerators" was published by researchers at Georgia Tech. Abstract: "3D heterogeneous integration (3D HI) offers promising solutions for incorporating substantial embedded memory into cutting-edge analog compute-in-memory (CIM) AI accelerators, ad... » read more

Tame IR Drop Like Google
By Jeff Wilson - 16 Jan, 2025 - Comments: 0

In the relentless pursuit of semiconductor performance and efficiency, tech giants like Google are constantly pushing the boundaries of what's possible. As they scale their designs to the cutting-edge 3nm node, power integrity has emerged as a critical challenge that must be overcome. Enter Calibre DesignEnhancer (DE), Siemens' analysis-based solution for enhancing design reliability and man... » read more

Enhancing Power Reliability Through Design-Stage Layout Optimization
By Jeff Wilson - 19 Dec, 2024 - Comments: 0

As integrated circuit (IC) designs continue to scale, the demand for efficient power management, performance optimization and reliable physical layout modification grows more critical. Meeting these power, performance and area (PPA) targets is essential for ensuring that IC designs operate effectively at advanced process nodes. One of the main challenges for design and verification engineers is... » read more

Voltage Drop Now Requires Dynamic Analysis
By Karen Heyman - 08 Aug, 2024 - Comments: 0

At one time a relatively infrequent occurrence, voltage drop is now a major impediment to reliability at advanced nodes. Decades ago, voltage drop was only an issue for very large and high-speed designs, where there was concern about supply lines delivering full voltage to transistors. As design margins have tightened in modern advanced designs, controlling voltage drop has become a requiremen... » read more

A Hybrid ECO Detailed Placement Flow for Mitigating Dynamic IR Drop (UC San Diego)
By Technical Paper Link - 01 Aug, 2024 - Comments: 0

A new technical paper titled "A Hybrid ECO Detailed Placement Flow for Improved Reduction of Dynamic IR Drop" was published by researchers at UC San Diego. Abstract: "With advanced semiconductor technology progressing well into sub-7nm scale, voltage drop has become an increasingly challenging issue. As a result, there has been extensive research focused on predicting and mitigating dynam... » read more

ML Method To Predict IR Drop Levels
By Technical Paper Link - 21 Jun, 2024 - Comments: 0

A new technical paper titled "IR drop Prediction Based on Machine Learning and Pattern Reduction" was published by researchers at National Tsing Hua University, National Taiwan University of Science and Technology, and MediaTek. Abstract (partial) "In this paper, we propose a machine learning-based method to predict IR drop levels and present an algorithm for reducing simulation patterns, w... » read more

Integrated, Turnkey Droop Response System: Heterogeneous IP Use Case
By Movellus - 29 May, 2024 - Comments: 0

Whether you serve the ADAS, PC, or networking market, chances are that your SoC is heterogeneous; containing general processors and application-specific accelerators. Your solution might have a systolic array for convolutions, a cluster of CPUs for application code, or a look-aside crypto engine for packet security. While application-specific accelerators significantly improve performance and p... » read more

Electromigration And IR Drop At Advanced Nodes
By Ed Sperling - 22 May, 2024 - Comments: 0

Manufacturing chips at 3nm and below is a challenge, but it's only part of the problem. Designing chips that can be manufactured and will actually work is potentially an even bigger problem. There is more data to sift through for place-and-route, less margin to pad a design, and there are more physical effects to contend with as transistors get taller, density increases, and chips age. Jeff Wil... » read more

Using AI/ML To Minimize IR Drop
By Ann Mutschler - 11 Apr, 2024 - Comments: 1

IR drop is becoming a much bigger problem as technology nodes scale and more components are packed into advanced packages. This is partly a result of physics, but it's also the result of how the design flow is structured. In most cases, AI/ML can help. The underlying problem is that moving to advanced process nodes, and now 3D-ICs, is driving current densities higher, while the power envelop... » read more

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