HBM Options Increase As AI Demand Soars

By Laura Peters - 21 Nov, 2024 - Comments: 0

High-bandwidth memory (HBM) sales are spiking as the amount of data that needs to be processed quickly by state-of-the-art AI accelerators, graphic processing units, and high-performance computing applications continues to explode. HBM inventories are sold out, driven by massive efforts and investments in developing and improving large language models such as ChatGPT. HBM is the memory of ch... » read more

Tradeoffs In Leading-Edge Chip Design

By Katherine Derbyshire - 21 Nov, 2024 - Comments: 0

Device design begins with the anticipated workload. What is it actually supposed to do? What resources — computational units, memory, sensors — are available? Answering these questions and developing the functional architecture are the first steps in a new design — well before committing it to silicon, said Tim Kogel, senior director of technical product management at Synopsys. Yet eve... » read more

Chip Industry Week In Review

By The SE Staff - 15 Nov, 2024 - Comments: 0

CSIS issued a new report that says Intel is "not too big to fail, but too good to lose." The report noted that Intel is needed for national security, and that it must be viewed in a geopolitical context rather than from a purely business standpoint when it comes to funding the company. Japan's government is creating a 10 trillion yen (~$65 billion) fund for next-gen technologies, including A... » read more

Chip Industry Technical Paper Roundup: Oct. 29

By Linda Christensen - 29 Oct, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=375 /] More Reading Chip Industry Week In Review Intel’s EU court win; high-NA benchmarks and new maskless litho; SiC down, GaN up; Natcast’s plan; Xiaomi’s 3nm chip; semi tax credit rules; RISC-V; lithium mine; AI-edge expansion. Technical Paper Library home » read more

Characterizing Defects Inside Hexagonal Boron Nitride (KAIST, NYU, et al.)

By Technical Paper Link - 23 Oct, 2024 - Comments: 0

A new technical paper titled "Characterizing Defects Inside Hexagonal Boron Nitride Using Random Telegraph Signals in van der Waals 2D Transistors" was published by researchers at KAIST, NYU, Brookhaven National Laboratory, and National Institute for Materials Science. Abstract: "Single-crystal hexagonal boron nitride (hBN) is used extensively in many two-dimensional electronic and quantu... » read more

Chip Industry Week In Review

By The SE Staff - 04 Oct, 2024 - Comments: 0

Amkor will provide turnkey advanced packaging and test services to TSMC in Amkor's planned facility in Peoria, Arizona, in a deal announced on Thursday. The companies jointly specified the packaging technologies, such as TSMC’s Integrated Fan-Out (InFO) and Chip on Wafer on Substrate (CoWoS). President Biden signed into law a bill that exempts some semiconductor projects funded by the U.S.... » read more

Preparing For Ferroelectric Devices

By Katherine Derbyshire - 02 Oct, 2024 - Comments: 0

The discovery of ferroelectricity in materials that are compatible with integrated circuit manufacturing has sparked a wave of interest in ferroelectric devices. Ferroelectrics are materials with a permanent polarization, the direction of which can be switched by an applied field. This polarization can be used to raise or lower the threshold voltage of a transistor, as in FeFETs, or it can c... » read more

Chip Industry Technical Paper Roundup: Sept. 24

By Linda Christensen - 24 Sep, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=358 /] More ReadingTechnical Paper Library home » read more

Chip Industry Week In Review

By The SE Staff - 20 Sep, 2024 - Comments: 0

Synopsys agreed to sell its Optical Solutions Group to Keysight for an undisclosed amount, in a deal deemed necessary for Synopsys to win regulatory approval for its planned acquisition of Ansys. The sale to Keysight is contingent on the Synopsys-Ansys deal going through. Meanwhile, Ansys has its own optical business. The U.S. Department of Defense (DoD) made the first awards for Microelectr... » read more

Energy-Efficient DRAM↔PIM Transfers for PIM Systems (KAIST)

By Technical Paper Link - 18 Sep, 2024 - Comments: 0

A new technical paper titled "PIM-MMU: A Memory Management Unit for Accelerating Data Transfers in Commercial PIM Systems" was published by researchers at KAIST. Abstract "Processing-in-memory (PIM) has emerged as a promising solution for accelerating memory-intensive workloads as they provide high memory bandwidth to the processing units. This approach has drawn attention not only from the... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: KAIST

HBM Options Increase As AI Demand Soars

Tradeoffs In Leading-Edge Chip Design

Chip Industry Week In Review

Chip Industry Technical Paper Roundup: Oct. 29

Characterizing Defects Inside Hexagonal Boron Nitride (KAIST, NYU, et al.)

Chip Industry Week In Review

Preparing For Ferroelectric Devices

Chip Industry Technical Paper Roundup: Sept. 24

Chip Industry Week In Review

Energy-Efficient DRAM↔PIM Transfers for PIM Systems (KAIST)