tag: KAIST

Chip Industry’s Technical Paper Roundup: Nov. 1
By Linda Christensen - 01 Nov, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=61 /] » read more

L-FinFET Neuron For A Highly Scalable Capacitive Neural Network (KAIST)
By Technical Paper Link - 31 Oct, 2022 - Comments: 0

A new technical paper titled "An Artificial Neuron with a Leaky Fin-Shaped Field-Effect Transistor for a Highly Scalable Capacitive Neural Network" was published by researchers at KAIST (Korea Advanced Institute of Science and Technology). “In commercialized flash memory, tunnelling oxide prevents the trapped charges from escaping for better memory ability. In our proposed FinFET neuron, t... » read more

Technical Paper Round-Up: July 18
By Linda Christensen - 18 Jul, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=33 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit fo... » read more

Research Bits: July 18
By Jesse Allen - 18 Jul, 2022 - Comments: 0

CXL memory disaggregation Researchers from the Korea Advanced Institute of Science and Technology (KAIST) developed a Compute Express Link (CXL) solution for directly accessible, high-performance memory disaggregation that they say significantly improves performance compared to existing remote direct memory access (RDMA)-based memory disaggregation. RDMA enables a host to directly access an... » read more

SW/HW Framework for for GASNet-enabled FPGA Hardware Acceleration Infrastructure
By Technical Paper Link - 14 Jul, 2022 - Comments: 0

Researchers from KAIST and Flapmax published a new technical paper titled "FSHMEM: Supporting Partitioned Global Address Space on FPGAs for Large-Scale Hardware Acceleration Infrastructure." Abstract "By providing highly efficient one-sided communication with globally shared memory space, Partitioned Global Address Space (PGAS) has become one of the most promising parallel computing model... » read more

Technical Paper Round-Up: May 24
By Linda Christensen - 24 May, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week.   [table id=29 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a ... » read more

Neurosynaptic Device That Mimics Synaptic and Intrinsic Plasticity Concomitantly In a Single cell
By Technical Paper Link - 20 May, 2022 - Comments: 0

New academic paper titled "Simultaneous emulation of synaptic and intrinsic plasticity using a memristive synapse" from researchers at Korea Advanced Institute of Science and Technology (KAIST). Abstract Neuromorphic computing targets the hardware embodiment of neural network, and device implementation of individual neuron and synapse has attracted considerable attention. The emulation of... » read more

Week In Review: Manufacturing, Test
By Linda Christensen - 06 May, 2022 - Comments: 0

Acquisitions & Investments California-based MaxLinear plans to acquire Taiwan-based Silicon Motion (SMI), in a cash and stock deal valued at about $3.8 billion. Silicon Motion’s NAND flash controller technology for solid state storage devices, will extend MaxLinear’s RF, analog, and mixed signal portfolio. ISMC will invest about $3 billion in a semiconductor plant in India’s south... » read more

Technical Paper Round-up: May 3
By Linda Christensen - 03 May, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=24 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

Vertically stacked, low-voltage organic ternary logic circuits including nonvolatile floating-gate memory transistors
By Technical Paper Link - 02 May, 2022 - Comments: 0

Research paper from KAIST and Gachon University. Abstract "Multi-valued logic (MVL) circuits based on heterojunction transistor (HTR) have emerged as an effective strategy for high-density information processing without increasing the circuit complexity. Herein, an organic ternary logic inverter (T-inverter) is demonstrated, where a nonvolatile floating-gate flash memory is employed to ... » read more

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