Blog Review: Nov. 20


Siemens’ Jonathan Muirhead explains why matching and symmetry are so important for analog and RF circuits, especially in topological structures like differential pairs and current mirrors, and introduces checking techniques to ensure compliance. Cadence's Satish Kumar Padhi examines the significance of randomization in PCIe IDE verification, focusing on how it ensures data integrity and en... » read more

Chip Industry Week In Review


CSIS issued a new report that says Intel is "not too big to fail, but too good to lose." The report noted that Intel is needed for national security, and that it must be viewed in a geopolitical context rather than from a purely business standpoint when it comes to funding the company. Japan's government is creating a 10 trillion yen (~$65 billion) fund for next-gen technologies, including A... » read more

Shift Left Is The Tip Of The Iceberg


Shift left is evolving from a buzzword into a much broader shift in design methodology and EDA tooling, and while it's still early innings there is widespread agreement that it will be transformative. The semiconductor industry has gone through many changes over the past few decades. Some are obvious, but others happen because of a convergence of multiple factors that require systemic change... » read more

Big Changes Ahead For Analog Design


Experts at the Table: Semiconductor Engineering sat down to discuss the impact of heterogeneous integration on in-house analog tools, and how that is changing the design process, with Mo Faisal, president and CEO of Movellus; Hany Elhak, executive director of product management at Synopsys; Cedric Pujol, product manager at Keysight; and Pradeep Thiagarajan, principal product manager for custom ... » read more

Blog Review: Nov. 6


Cadence's Satish Kumar C explores how the Deferrable Memory Write transaction type in PCIe and CXL can improve latency, efficiency, and performance by delaying certain memory write operations during system bus congestion or until other priority tasks are complete and highlights implementation and verification challenges. Synopsys' Daryl Seitzer and Rahul Thukral point to magnetoresistive RAM... » read more

Chiplets Make Progress Using Interconnects As Glue


Breaking up SoCs into their component parts and putting those and other pieces together in some type of heterogeneous assembly is beginning to take shape, fueled by advances in interconnects, complex partitioning, and industry learnings about what works and what doesn't. While the vision of plug-and-play remains intact, getting there is a lot more complicated than initially imagined. It can ... » read more

Mastering Cyber Awareness: Training For The Digital Battlefield


In today’s digital battlefield, cyber awareness is crucial for warfighters. To effectively prepare them, it’s essential to create realistic and detailed models of mobile networks, encompassing both physical and virtual infrastructure. This is where network modeling software comes into play, offering a high-fidelity approach to enhance cyber situational awareness. A high-fidelity modeling an... » read more

Blog Review: Oct. 30


Synopsys' Frank Schirrmeister argues that hardware-assisted verification techniques like emulation and prototyping are essential to help engineers improve design behavior to manage complexity and ensure systems function seamlessly in real-world applications. Siemens’ Stephen V. Chavez finds that ultra high-density interconnect (UHDI) has changed the design and production of PCBs to enable ... » read more

Four Real-World Applications for Electromagnetic Simulation


With the complexity of integrated circuit (IC) components increasing, electromagnetic (EM) circuit simulation is now critical for accurate and efficient design. The EM effects on a circuit can drastically alter voltage levels and damage semiconductor devices. With EM simulation, designers can account for EM effects on their circuit to avoid costly problems before they happen. EM simulation e... » read more

Chip Industry Week In Review


Europe's top court ruled in Intel's favor, voiding a $1.1 billion fine imposed by the European Union and dismissing charges of anti-competitive behavior. IBM released yield benchmarks for high-NA EUV, which serve as proof points that the newest advanced litho equipment will enable scaling beyond the 2nm process node. Also on the lithography front, Nikon is developing a maskless digital litho... » read more

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