Designing Vehicles Virtually


The shift toward software-defined vehicles (SDVs), electric vehicles (EVs), and ultimately autonomous vehicles (AVs) is proving the value and exposing the weaknesses in simulating individual components and complete vehicles. The ability to model this intensely complex maze of real-world interactions and possible scenarios is improving, and it's happening faster than comparable road-testing o... » read more

Blog Review: September 6


Cadence's Reela Samuel listens in as industry experts discuss whether generative AI-powered tools could facilitate the creation of diverse chip types and address talent shortages by creating  a more accessible entry point for those interested in circuit, chip, or system design. Synopsys' Ian Land, Jigesh Patel, and Kenneth Larsen find that the way that today’s government, aerospace, and d... » read more

Week In Review: Design, Low Power


Design & IP Arm launched the Neoverse Compute Subsystems (CSS), pre-integrated and validated configurations of Arm Neoverse platform IP, at this week's Hot Chips conference. CSS helps streamline SoC designs for data centers and is optimized for an advanced 5nm process. The first generation of CSS (Neoverse CSS N2) is based on Arm’s Neoverse N2 platform. Core count is configurable (24 to ... » read more

Automotive Complexity, Supply Chain Strength Demands Tech Collaboration


The automotive supply chain is becoming more complex and collaborative, changing longstanding relationships between automakers and their suppliers in ways that would have seemed unimaginable even a couple of years ago. Rather than just developing parts for a tightly defined specification, suppliers are taking an increasingly active role in determining how various technologies are combined, w... » read more

Blog Review: August 30


Siemens' Dan Yu examines hallucinations in large language models, the Universal Approximation Theorem, and the role they play in applying LLMs to EDA. Cadence's Mamta Rana introduces shared flow control in PCIe 6.0, which enables the reduced cost implementation of multiple virtual channels by allowing common sets of resources to be shared. Synopsys' Arturo Salz and Johannes Stahl note tha... » read more

Week In Review: Auto, Security, Pervasive Computing


The AI chip market is booming. Gartner expects revenue for the year will hit $53.4 billion, up 20.9% from 2022. The firm predicts that number will grow to $119 billion by 2027.  In the consumer electronics market, the value of AI-enabled application processors will amount to $1.2 billion in 2023, up from $558 million in 2022. Germany will spend nearly €1 billion (~US$1.7B) over the next t... » read more

Wide Bandgap Semiconductors: What Modeling Challenges Must We Overcome


As power electronics shrink in size, the demands on power, frequency, and efficiency grow exponentially. The semiconductor industry is leaning heavily into wide bandgap materials like gallium nitride (GaN) and silicon carbide (SiC) to help meet these demands. Recent research projects that the global GaN semiconductor devices market will grow at a CAGR of 25.4% from 2023 to 2030. However, the ... » read more

AI, Rising Chip Complexity Complicate Prototyping


Prototyping, an essential technology for designing complex chips in tight market windows, is becoming significantly more challenging for the growing number of designs that include AI/ML. Prototyping remains one of the foundational pillars of the whole shift left movement, allowing software to be developed and tested before actual silicon is available. That, in turn, enables multiple teams t... » read more

Blog Review: Aug. 23


Siemens' Stephen Chavez discusses best practices when it comes to thermal analysis for PCB design, including component placement and close collaboration between mechanical and electrical engineering disciplines. Synopsys' Gary Ruggles, Richard Solomon, and Varun Agrawal introduce the Compute Express Link (CXL) specification and how it could help improve latency through computational offloadi... » read more

Blog Review: Aug. 16


Synopsys' Johannes Stahl and Tim Kogel suggest that multi-die systems require a new approach at the architecture planning phase and why chip designers can’t ignore physical effects such as layout, power, temperature, or IR-drop. Siemens' Rich Edelman argues for using the waveform window in a GUI rather than $display when debugging UVM. Cadence's Paul Scannell stresses the need for diver... » read more

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